As part of the effort to support Atom processors it became apparent the they can only support microcode updates before RAM is available. In this early environment the device tree is not available.
This series solves this problem by updating ifdtool to provide very early microcode access on these platforms.
Simon Glass (8): x86: Add a script to process Intel microcode files x86: ifdtool: Correct a debug() missing parameter x86: ifdtool: Display filename when file errors are reported x86: ifdtool: Use a structure for the file/address list x86: ifdtool: Add support for early microcode access x86: Move microcode updates into a separate directory x86: ivybridge: Update the microcode x86: Convert microcode format to device-tree-only
Makefile | 4 +- arch/x86/cpu/ivybridge/microcode_intel.c | 2 + arch/x86/cpu/queensbay/M0220661105.inc | 1288 ------------------------- arch/x86/cpu/queensbay/tnc_car.S | 11 +- arch/x86/dts/crownbay.dts | 7 + arch/x86/dts/link.dts | 4 +- arch/x86/dts/m12206a7_00000028.dtsi | 622 ------------ arch/x86/dts/m12306a9_00000017.dtsi | 750 -------------- arch/x86/dts/microcode/m0120661104.dtsi | 366 +++++++ arch/x86/dts/microcode/m12206a7_00000029.dtsi | 686 +++++++++++++ arch/x86/dts/microcode/m12306a9_0000001b.dtsi | 814 ++++++++++++++++ tools/Makefile | 1 + tools/ifdtool.c | 162 +++- tools/microcode-tool | 1 + tools/microcode-tool.py | 165 ++++ 15 files changed, 2189 insertions(+), 2694 deletions(-) delete mode 100644 arch/x86/cpu/queensbay/M0220661105.inc delete mode 100644 arch/x86/dts/m12206a7_00000028.dtsi delete mode 100644 arch/x86/dts/m12306a9_00000017.dtsi create mode 100644 arch/x86/dts/microcode/m0120661104.dtsi create mode 100644 arch/x86/dts/microcode/m12206a7_00000029.dtsi create mode 100644 arch/x86/dts/microcode/m12306a9_0000001b.dtsi create mode 120000 tools/microcode-tool create mode 100755 tools/microcode-tool.py