--- MAINTAINERS | 2 - board/ixdp425/Makefile | 50 -------- board/ixdp425/ixdp425.c | 238 --------------------------------------- boards.cfg | 2 - doc/README.scrapyard | 2 + include/configs/ixdp425.h | 268 -------------------------------------------- include/configs/ixdpg425.h | 256 ------------------------------------------ 7 files changed, 2 insertions(+), 816 deletions(-) delete mode 100644 board/ixdp425/Makefile delete mode 100644 board/ixdp425/ixdp425.c delete mode 100644 include/configs/ixdp425.h delete mode 100644 include/configs/ixdpg425.h
diff --git a/MAINTAINERS b/MAINTAINERS index 2f60a60..5b2fb57 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -786,7 +786,6 @@ John Rigby jcrigby@gmail.com
Stefan Roese sr@denx.de
- ixdpg425 xscale/ixp pdnb3 xscale/ixp scpu xscale/ixp
@@ -894,7 +893,6 @@ Unknown / orphaned boards: Board CPU Last known maintainer / Comment ......................................................................... cradle xscale/pxa Kyle Harris kharris@nexus-tech.net / dead address - ixdp425 xscale/ixp Kyle Harris kharris@nexus-tech.net / dead address lubbock xscale/pxa Kyle Harris kharris@nexus-tech.net / dead address
imx31_phycore_eet i.MX31 Guennadi Liakhovetski g.liakhovetski@gmx.de / resigned diff --git a/board/ixdp425/Makefile b/board/ixdp425/Makefile deleted file mode 100644 index 4ba0383..0000000 --- a/board/ixdp425/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := ixdp425.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) - $(call cmd_link_o_target, $(OBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c deleted file mode 100644 index 7269458..0000000 --- a/board/ixdp425/ixdp425.c +++ /dev/null @@ -1,238 +0,0 @@ -/* - * (C) Copyright 2006 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * (C) Copyright 2002 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger mgroeger@sysgo.de - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <command.h> -#include <malloc.h> -#include <netdev.h> -#include <asm/arch/ixp425.h> -#include <asm/io.h> -#ifdef CONFIG_PCI -#include <pci.h> -#include <asm/arch/ixp425pci.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -#define IXDP425_LED_PORT 0x52000000 /* 4-digit hex display */ - -int board_early_init_f(void) -{ - /* CS2: LED port */ - writel(0xbcff0002, IXP425_EXP_CS2); - writew(0x0001, IXDP425_LED_PORT); /* output postcode to LEDs */ - - return 0; -} - -#ifdef CONFIG_PCI -#ifndef CONFIG_PCI_PNP -static struct pci_config_table pci_ixpdp425_config_table[] = { - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x00, PCI_ANY_ID, - pci_cfgfunc_config_device, - { 0x400, - 0x40000000, - PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } }, - - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x01, PCI_ANY_ID, - pci_cfgfunc_config_device, - { 0x800, - 0x40010000, - PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } }, - - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x02, PCI_ANY_ID, - pci_cfgfunc_config_device, - { 0xc00, - 0x40020000, - PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } }, - - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x03, PCI_ANY_ID, - pci_cfgfunc_config_device, - { 0x1000, - 0x40030000, - PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER } }, - { } -}; -#endif - -struct pci_controller hose = { -#ifndef CONFIG_PCI_PNP - config_table: pci_ixpdp425_config_table, -#endif -}; -#endif /* CONFIG_PCI */ - - -/* - * Miscelaneous platform dependent initialisations - */ -int board_init(void) -{ - writew(0x0002, IXDP425_LED_PORT); /* output postcode to LEDs */ - -#ifdef CONFIG_IXDPG425 - /* arch number of IXDP */ - gd->bd->bi_arch_number = MACH_TYPE_IXDPG425; -#else - /* arch number of IXDP */ - gd->bd->bi_arch_number = MACH_TYPE_IXDP425; -#endif - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x00000100; - -#ifdef CONFIG_IXDPG425 - /* - * Get realtek RTL8305 switch and SLIC out of reset - */ - GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SWITCH_RESET_N); - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SWITCH_RESET_N); - GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SLIC_RESET_N); - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SLIC_RESET_N); - - /* - * Setup GPIOs for PCI INTA & INTB - */ - GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA_N); - GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA_N); - GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB_N); - GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB_N); - - /* Setup GPIOs for 33MHz clock output */ - writel(0x01FF01FF, IXP425_GPIO_GPCLKR); - - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK); - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK); - - /* set GPIO8..11 interrupt type to active low */ - writel((0x1 << 9) | (0x1 << 6) | (0x1 << 3) | 0x1, IXP425_GPIO_GPIT2R); - - /* clear pending interrupts */ - writel(-1, IXP425_GPIO_GPISR); - - /* assert PCI reset */ - GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_SLIC_RESET_N); - - udelay(533); - - /* deassert PCI reset */ - GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SLIC_RESET_N); - - udelay(533); - -#else /* IXDP425 */ - /* Setup GPIOs for 33MHz ExpBus and PCI clock output */ - writel(0x01FF01FF, IXP425_GPIO_GPCLKR); - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK); - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK); - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_RESET_N); - - /* set GPIO8..11 interrupt type to active low */ - writel((0x1 << 9) | (0x1 << 6) | (0x1 << 3) | 0x1, IXP425_GPIO_GPIT2R); - /* clear pending interrupts */ - writel(-1, IXP425_GPIO_GPISR); - - /* assert PCI reset */ - GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PCI_RESET_N); - - udelay(533); - - /* deassert PCI reset */ - GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_PCI_RESET_N); - - udelay(533); -#endif - - return 0; -} - -/* - * Check Board Identity - */ -int checkboard(void) -{ - char buf[64]; - int i = getenv_f("serial#", buf, sizeof(buf)); - -#ifdef CONFIG_IXDPG425 - puts("Board: IXDPG425 - Intel Network Gateway Reference Platform"); -#else - puts("Board: IXDP425 - Intel Development Platform"); -#endif - - if (i > 0) { - puts(", serial# "); - puts(buf); - } - putc('\n'); - - return 0; -} - -int dram_init(void) -{ - /* we can only map 64MB via PCI, so we limit memory - until a better solution is implemented. */ -#ifdef CONFIG_PCI - gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 64<<20); -#else - gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 256<<20); -#endif - return 0; -} - -#ifdef CONFIG_PCI -void pci_init_board(void) -{ - pci_ixp_init(&hose); -} - -/* - * dev 0 on the PCI bus is not the host bridge, so we have to override - * these functions in order to not skip PCI slot 0 during configuration. -*/ -int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev) -{ - return 0; -} -int pci_print_dev(struct pci_controller *hose, pci_dev_t dev) -{ - return 1; -} - -#endif - -int board_eth_init(bd_t *bis) -{ -#ifdef CONFIG_PCI - pci_eth_init(bis); -#endif - return cpu_eth_init(bis); -} diff --git a/boards.cfg b/boards.cfg index 8a5bfc1..d32ff7e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -194,8 +194,6 @@ actux2 arm ixp actux3 arm ixp actux4 arm ixp dvlhost arm ixp -ixdp425 arm ixp -ixdpg425 arm ixp ixdp425 balloon3 arm pxa cerf250 arm pxa colibri_pxa270 arm pxa diff --git a/doc/README.scrapyard b/doc/README.scrapyard index d68da2e..30aeccd 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -69,3 +69,5 @@ MVS1 powerpc MPC823 306620b 2008-08-26 Andre Schwarz <andre.schwarz@matrix-vis adsvix ARM PXA27x 7610db1 2008-07-30 Adrian Filipi adrian.filipi@eurotech.com R5200 ColdFire 48ead7a 2008-03-31 Zachary P. Landau zachary.landau@labxtechnologies.com CPCI440 powerpc 440GP b568fd2 2007-12-27 Matthias Fuchs matthias.fuchs@esd-electronics.com +ixdpg425 ARM xscale/ixp - 2011-09-22 Stefan Roese sr@denx.de +ixdp425 ARM xscale/ixp - 2011-09-22 Kyle Harris kharris@nexus-tech.net diff --git a/include/configs/ixdp425.h b/include/configs/ixdp425.h deleted file mode 100644 index d6ef3b3..0000000 --- a/include/configs/ixdp425.h +++ /dev/null @@ -1,268 +0,0 @@ -/* - * (C) Copyright 2003 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * Configuation settings for the IXDP425 board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_IXP425 1 /* This is an IXP425 CPU */ -#define CONFIG_IXDP425 1 /* on an IXDP425 Board */ - -#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */ -#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */ - -/* - * select serial console configuration - */ -#define CONFIG_IXP_SERIAL -#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 -#define CONFIG_BAUDRATE 115200 - -#define CONFIG_BOARD_EARLY_INIT_F 1 - -/*************************************************************** - * U-boot generic defines start here. - ***************************************************************/ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* Command line configuration. */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ELF - -#define CONFIG_PCI -#ifdef CONFIG_PCI -#define CONFIG_CMD_PCI -#define CONFIG_PCI_PNP -#define CONFIG_IXP_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_CMD_PCI_ENUM -#define CONFIG_EEPRO100 -#endif - -#define CONFIG_BOOTCOMMAND "run boot_flash" -/* enable passing of ATAGs */ -#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ - -/* timer clock - 2* OSC_IN system clock */ -#define CONFIG_IXP425_TIMER_CLK 66666666 -#define CONFIG_SYS_HZ 1000 - -/* default load address */ -#define CONFIG_SYS_LOAD_ADDR 0x00010000 - -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ - -/*************************************************************** - * Platform/Board specific defines start here. - ***************************************************************/ - -/* - * Hardware drivers - */ - -/* - * Physical Memory Map - */ -#define CONFIG_SYS_TEXT_BASE 0x50000000 - -#define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */ -#define PHYS_FLASH_BANK_SIZE 0x00800000 /* 8 MB Banks */ -#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ -#define CONFIG_BOARD_SIZE_LIMIT 262144 - -/* Expansion bus settings */ -#define CONFIG_SYS_EXP_CS0 0xbcd23c42 - -/* SDRAM settings */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 - -#define CONFIG_SYS_SDR_CONFIG 0xd -#define CONFIG_SYS_SDR_MODE_CONFIG 0x1 -#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a - -/* - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - -#define CONFIG_ENV_IS_IN_FLASH 1 - -#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 } - -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ - -#define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x40000) -#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ - -/* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -/* no byte writes on IXP4xx */ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* Ethernet */ - -/* include IXP4xx NPE support */ -#define CONFIG_IXP4XX_NPE 1 -#define CONFIG_NET_MULTI 1 -/* NPE0 PHY address */ -#define CONFIG_PHY_ADDR 0 -/* NPE1 PHY address (HW Release E only) */ -#define CONFIG_PHY1_ADDR 1 -/* MII PHY management */ -#define CONFIG_MII 1 -/* Number of ethernet rx buffers & descriptors */ -#define CONFIG_SYS_RX_ETH_BUFFER 16 - -#define CONFIG_HAS_ETH1 1 - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#undef CONFIG_CMD_NFS - -/* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "npe_ucode=50060000\0" \ - "mtd=IXP4XX-Flash.0:256k(uboot),128k(env),128k(ucode),2048k(linux),-(root)\0" \ - "kerneladdr=50080000\0" \ - "kernelfile=ixdp425/uImage\0" \ - "rootfile=ixdp425/rootfs\0" \ - "rootaddr=50280000\0" \ - "loadaddr=10000\0" \ - "updateboot_ser=mw.b 10000 ff 40000;" \ - " loady ${loadaddr};" \ - " run eraseboot writeboot\0" \ - "updateboot_net=mw.b 10000 ff 40000;" \ - " tftp ${loadaddr} ixdp425/u-boot.bin;" \ - " run eraseboot writeboot\0" \ - "eraseboot=protect off 50000000 5003ffff;" \ - " erase 50000000 5003ffff\0" \ - "writeboot=cp.b 10000 50000000 ${filesize}\0" \ - "updateucode=loady;" \ - " era ${npe_ucode} +${filesize};" \ - " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ - "updateroot=tftp ${loadaddr} ${rootfile};" \ - " era ${rootaddr} +${filesize};" \ - " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ - "updatekern=tftp ${loadaddr} ${kernelfile};" \ - " era ${kerneladdr} +${filesize};" \ - " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ - "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ - "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ - "boot_flash=run flashargs addtty addeth;" \ - " bootm ${kerneladdr}\0" \ - "boot_net=run netargs addtty addeth;" \ - " tftpboot ${loadaddr} ${kernelfile};" \ - " bootm\0" - -/* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - -/* - * GPIO settings - */ -#define CONFIG_SYS_GPIO_UTOPIA_GPIO1 0 -#define CONFIG_SYS_GPIO_UTOPIA_IRQ_N 1 -#define CONFIG_SYS_GPIO_HSS1_IRQ_N 2 -#define CONFIG_SYS_GPIO_HSS0_IRQ_N 3 -#define CONFIG_SYS_GPIO_ETH0_IRQ_N 4 -#define CONFIG_SYS_GPIO_ETH1_IRQ_N 5 -#define CONFIG_SYS_GPIO_I2C_SCL 6 -#define CONFIG_SYS_GPIO_I2C_SDA 7 -#define CONFIG_SYS_GPIO_PCI_INTD_N 8 -#define CONFIG_SYS_GPIO_PCI_INTC_N 9 -#define CONFIG_SYS_GPIO_PCI_INTB_N 10 -#define CONFIG_SYS_GPIO_PCI_INTA_N 11 -#define CONFIG_SYS_GPIO_UTOPIA_GPIO0 12 -#define CONFIG_SYS_GPIO_PCI_RESET_N 13 -#define CONFIG_SYS_GPIO_PCI_CLK 14 -#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 - -#endif /* __CONFIG_H */ diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h deleted file mode 100644 index 3de0013..0000000 --- a/include/configs/ixdpg425.h +++ /dev/null @@ -1,256 +0,0 @@ -/* - * (C) Copyright 2005-2006 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * (C) Copyright 2003 - * Martijn de Gouw, Prodrive B.V., martijn.de.gouw@prodrive.nl - * - * Configuation settings for the IXDPG425 board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_IXP425 1 /* This is an IXP425 CPU */ -#define CONFIG_IXDPG425 1 /* on an IXDPG425 Board */ - -#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */ -#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */ - -/* - * Ethernet - */ -#define CONFIG_IXP4XX_NPE 1 /* include IXP4xx NPE support */ -#define CONFIG_NET_MULTI 1 -#define CONFIG_PHY_ADDR 5 /* NPE0 PHY address */ -#define CONFIG_HAS_ETH1 -#define CONFIG_PHY1_ADDR 4 /* NPE1 PHY address */ -#define CONFIG_MII 1 /* MII PHY management */ -#define CONFIG_SYS_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */ - -/* - * Misc configuration options - */ - -#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */ -#define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (256 << 10) - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_IXP_SERIAL -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_ELF -#define CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING - - -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ -#define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */ - -#define CONFIG_IXP425_TIMER_CLK 66666666 -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*************************************************************** - * Platform/Board specific defines start here. - ***************************************************************/ - -/*----------------------------------------------------------------------- - * Default configuration (environment varibles...) - *----------------------------------------------------------------------*/ -#define CONFIG_PREBOOT "echo;" \ - "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ - "echo" - -#undef CONFIG_BOOTARGS - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "hostname=ixdpg425\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ - "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\ - "flash_nfs=run nfsargs addip addtty;" \ - "bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip addtty;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ - "rootpath=/opt/eldk/arm\0" \ - "bootfile=/tftpboot/ixdpg425/uImage\0" \ - "kernel_addr=50080000\0" \ - "ramdisk_addr=50200000\0" \ - "load=tftp 100000 /tftpboot/ixdpg425/u-boot.bin\0" \ - "update=protect off 50000000 5003ffff;era 50000000 5003ffff;" \ - "cp.b 100000 50000000 40000;" \ - "setenv filesize;saveenv\0" \ - "upd=run load update\0" \ - "" -#define CONFIG_BOOTCOMMAND "run net_nfs" - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ - -#define CONFIG_SYS_TEXT_BASE 0x50000000 - -#define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */ -#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */ -#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ - -#define CONFIG_SYS_DRAM_BASE 0x00000000 -#define CONFIG_SYS_DRAM_SIZE 0x01000000 - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ - -/* - * Expansion bus settings - */ -#define CONFIG_SYS_EXP_CS0 0xbcd23c42 - -/* - * SDRAM settings - */ -#define CONFIG_SYS_SDR_CONFIG 0x18 -#define CONFIG_SYS_SDR_MODE_CONFIG 0x1 -#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a - -/* - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - -#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ -#define CONFIG_ENV_IS_IN_FLASH 1 - -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* hardware flash protection */ - -#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 } - -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */ - -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ - -#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ - -#define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x40000) -#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) - -/* - * GPIO settings - */ -#define CONFIG_SYS_GPIO_PCI_INTA_N 6 -#define CONFIG_SYS_GPIO_PCI_INTB_N 7 -#define CONFIG_SYS_GPIO_SWITCH_RESET_N 8 -#define CONFIG_SYS_GPIO_SLIC_RESET_N 13 -#define CONFIG_SYS_GPIO_PCI_CLK 14 -#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 - -/* - * Cache Configuration - */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - -/* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - -#endif /* __CONFIG_H */