On Saturday 16 January 2010 10:48:21 anup behare wrote:
Thanks Stenfan for your valuable inputs.
I have implemented the code suggested by you after completing the ddr initialization :
#if defined(CONFIG_DDR_DATA_EYE) /* * Running denali_core_search_data_eye() when ECC is enabled * causes non-ECC machine checks. This clears them. */ print_mcsr(); mtspr(SPRN_MCSR, mfspr(SPRN_MCSR)); print_mcsr(); #endif
before mtspr and after mtspr i am getting the same prints i.e EE,ME,CE disabled.
Please note that I am not referring to MSR, but to the MCSR register here. Not all PPC4xx variants have this register implemented. But most 44x ones should (SPR 0x23c).
Cheers, Stefan
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