"Russell McGuire" rmcguire@videopresence.com wrote on 06/03/2008 04:15:55 PM:
I haven't gone through the rest yet, but most likely if we want to keep
SPD
working for DDR2, we'll have to add the DDR2 definitions SPD into the
code,
as it looks like the DDR2 port is only partially complete.
-Russ
Russ,
That's pretty much jives with my recollection. One other thing that leaps to mind was the calculation for max_bus_clk. I hand cranked through that with a high clock rate as input and due to rounding errors got a bogus value. I don't remember the details right off the top of my head but it seems to me that the net result was I started with a bus clock that should have landed max_data_rate in one of those if-if-else-if cases, but it didn't. So I think that whole function (and especially the max_bus_clk calculation) needs to be gone through. Good luck. I'd help but I have my own issues with MTD :(.
Bruce