DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com --- Changes since v1: - Addressed comments from Tom. arch/arm/cpu/armv7/omap-common/hwinit-common.c | 3 +++ board/ti/dra7xx/evm.c | 31 ++++++++++++++++++++++++++ board/ti/dra7xx/mux_data.h | 1 + include/configs/dra7xx_evm.h | 1 + 4 files changed, 36 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c index 5f50a19..750f33d 100644 --- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c @@ -139,6 +139,9 @@ void s_init(void) #endif prcm_init(); #ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_BOARD_EARLY_INIT_F + board_early_init_f(); +#endif /* For regular u-boot sdram_init() is called from dram_init() */ sdram_init(); #endif diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 7f19655..5a2cf36 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -13,6 +13,8 @@ #include <common.h> #include <palmas.h> #include <sata.h> +#include <asm/gpio.h> +#include <asm/arch/gpio.h> #include <asm/arch/sys_proto.h> #include <asm/arch/mmc_host_def.h> #include <asm/arch/sata.h> @@ -26,6 +28,9 @@
DECLARE_GLOBAL_DATA_PTR;
+/* GPIO 7_11 */ +#define GPIO_DDR_VTT_EN 203 + const struct omap_sysinfo sysinfo = { "Board: DRA7xx\n" }; @@ -267,3 +272,29 @@ int board_eth_init(bd_t *bis) return ret; } #endif + +#ifdef CONFIG_BOARD_EARLY_INIT_F +/* VTT regulator enable */ +static inline void vtt_regulator_enable(void) +{ + if (omap_hw_init_context() == OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL) + return; + + /* Do not enable VTT for DRA722 */ + if (omap_revision() == DRA722_ES1_0) + return; + + /* + * EVM Rev G and later use gpio7_11 for DDR3 termination. + * This is safe enough to do on older revs. + */ + gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en"); + gpio_direction_output(GPIO_DDR_VTT_EN, 1); +} + +int board_early_init_f(void) +{ + vtt_regulator_enable(); + return 0; +} +#endif diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index c9e202a..bc17936 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -67,5 +67,6 @@ const struct pad_conf_entry core_padconf_array_essential[] = { {GPMC_CS2, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS0 */ {GPMC_CS3, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS1*/ {USB2_DRVVBUS, (M0 | IEN | FSC) }, + {SPI1_CS1, (PEN | IDIS | M14) }, }; #endif /* _MUX_DATA_DRA7XX_H_ */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 8d0a0eb..38e2d44 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -13,6 +13,7 @@ #define __CONFIG_DRA7XX_EVM_H
#define CONFIG_DRA7XX +#define CONFIG_BOARD_EARLY_INIT_F
#ifndef CONFIG_QSPI_BOOT /* MMC ENV related defines */