28 Apr
2014
28 Apr
'14
7:34 a.m.
On Friday, April 25, 2014 at 01:52:36 AM, Stephen Warren wrote:
From: Stephen Warren swarren@nvidia.com
ci_ep_queue() currently only fills in the page0/page1 fields in the queue item. If the buffer is larger than 4KiB (unaligned) or 8KiB (page-aligned), then this prevents the HW from knowing where to write the balance of the data.
Fix this by initializing all 5 pageN pointers, which allows up to 16KiB (potentially non-page-aligned) buffers.
Signed-off-by: Stephen Warren swarren@nvidia.com
Applied all, thanks. But can you please check if we can get the buffer allocation from 5/5 sorted please ? I'd really like that instead of such hacks.
Best regards, Marek Vasut