Add some settings required to set up the LPC correctly.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
arch/x86/dts/link.dts | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 4520db5..28cef07 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -169,6 +169,14 @@ #address-cells = <1>; #size-cells = <1>; gen-dec = <0x800 0xfc 0x900 0xfc>; + intel,gen-dec = <0x800 0xfc 0x900 0xfc>; + intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b + 0x80 0x80 0x80 0x80>; + intel,gpi-routing = <0 0 0 0 0 0 0 2 + 1 0 0 0 0 0 0 0>; + /* Enable EC SMI source */ + intel,alt-gp-smi-enable = <0x0100>; + cros-ec@200 { compatible = "google,cros-ec"; reg = <0x204 1 0x200 1 0x880 0x80>;