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On 12/12/2013 03:34 AM, Stefan Roese wrote:
On 04.12.2013 23:05, Tom Rini wrote:
On Thu, Nov 28, 2013 at 10:38:40AM +0100, Vladimir Koutny wrote:
In 48ec5291, only TX path was optimized; this does the same also for RX path. This results in huge increase of TFTP throughput on custom am3352 board (from 312KiB/s to 1.8MiB/s) and eliminates occasional transfer timeouts.
Signed-off-by: Vladimir Koutny vladimir.koutny@streamunlimited.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Tom Rini trini@ti.com
Applied to u-boot-ti/master, thanks!
I just tested on dxr2 (AM3352 based board) with latest mainline U-Boot. And the network performance is a bit better. But not as good as yours. Here my numbers:
Without this patch: ~400 KiB/s With this patch: ~570 KiB/s
Any ideas what might be missing on my platform? Why the speed is not as good?
I only got a small increase as well until I also grabbed the dcache enable patch. I need to find some time today to clean out the TI queue again.
- -- Tom