rename at91_spl_board_init into spl_board_init
Signed-off-by: Heiko Schocher hs@denx.de ---
Changes in v2: - rebase to 0d339cf9a969f0c249713d3697e735184f1bd955 - use SZ_xM defines
board/siemens/corvus/board.c | 2 +- include/configs/corvus.h | 22 +++++++++++----------- 2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c index 426d0cd..7d15317 100644 --- a/board/siemens/corvus/board.c +++ b/board/siemens/corvus/board.c @@ -77,7 +77,7 @@ static void corvus_nand_hw_init(void) #include <spl.h> #include <nand.h>
-void at91_spl_board_init(void) +void spl_board_init(void) { /* * For on the sam9m10g45ek board, the chip wm9711 stay in the test diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 2bad20f..fe16783 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -15,6 +15,7 @@ #define __CONFIG_H
#include <asm/hardware.h> +#include <linux/sizes.h>
#define CONFIG_SYS_GENERIC_BOARD /* @@ -81,7 +82,7 @@ #define CONFIG_SYS_SDRAM_SIZE 0x08000000
#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) + (CONFIG_SYS_SDRAM_BASE + SZ_4K - GENERATED_GBL_DATA_SIZE)
/* No NOR flash */ #define CONFIG_SYS_NO_FLASH @@ -128,7 +129,7 @@ #define CONFIG_DFU_NAND #define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 -#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 << 20) +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) #define DFU_MANIFEST_POLL_TIMEOUT 25000
/* USB DFU IDs */ @@ -136,15 +137,14 @@ #define CONFIG_G_DNL_PRODUCT_NUM 0x02d2 #define CONFIG_G_DNL_MANUFACTURER "Siemens AG"
-#define CONFIG_SYS_CACHELINE_SIZE 0x2000 -/* fuer was das ? */ +#define CONFIG_SYS_CACHELINE_SIZE SZ_8K #define CONFIG_SYS_LOAD_ADDR ATMEL_BASE_CS6
/* bootstrap + u-boot + env in nandflash */ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x100000 #define CONFIG_ENV_OFFSET_REDUND 0x180000 -#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_SIZE SZ_128K
#define CONFIG_BOOTCOMMAND \ "nand read 0x70000000 0x200000 0x300000;" \ @@ -171,15 +171,15 @@ * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ - 4*1024*1024, 0x1000) + SZ_4M, 0x1000) /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x300000 -#define CONFIG_SPL_MAX_SIZE (12 * 1024) -#define CONFIG_SPL_STACK (16 * 1024) +#define CONFIG_SPL_MAX_SIZE (12 * SZ_1K) +#define CONFIG_SPL_STACK (SZ_16K)
#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_BSS_MAX_SIZE (2 * 1024) +#define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K)
#define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT @@ -199,8 +199,8 @@ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K +#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ CONFIG_SYS_NAND_PAGE_SIZE) #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS