Thanks Jon
On 2/24/2024 5:53 AM, Jonathan Humphreys wrote:
The phy calibration pattern partition isn't needed as the Cadence driver isn't calibrating the phys.
Please do mention Fixes tag here
58d61fb5a77e ("arm: dts: k3-j721e-sk: Add initial A72 specific dts support")
Signed-off-by: Jonathan Humphreys j-humphreys@ti.com
arch/arm/dts/k3-j721e-sk-u-boot.dtsi | 4 ---- 1 file changed, 4 deletions(-)
diff --git a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi index 479b7bcd6f..20b76a84ff 100644 --- a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi @@ -157,9 +157,5 @@
flash@0 { bootph-all;
partition@3fc0000 {bootph-all;};
This Patch LTGM,
+ Neha
For further cleanup, we should not have these ospi nodes in u-boot dts file.
should be in board dts (k3-j721e-sk.dts) with right bootph properties ,
and comes via kernel DT.
};