Hi Simon,
On Tue, Jan 17, 2017 at 12:34 PM, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Mon, Jan 16, 2017 at 10:08 PM, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 14 January 2017 at 06:32, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Sun, Nov 20, 2016 at 4:25 AM, Simon Glass sjg@chromium.org wrote:
To avoid using BSS in SPL before SDRAM is set up, move this field to global_data.
Why is this needed? pirq routing table setup is done after SDRAM initialization. Isn't SPL doing this with a different order?
I'm not sure why it should. SPL sets up SDRAM so it should be able to set up interrupts, shouldn't it? Some device init may need interrupts, and my plan was to do all the 32-bit init in SPL.
Yes, but I see interrupt_init() is called after dram_init() in arch/x86/lib/spl.c, where BSS is already cleared after dram_init(). Am I missing anything?
Could you have a look at my comments?
Regards, Bin