
Hi Minkyu,
Now proper GPIO parts numbering is handled at Samsung devices. This fix is necessary for code using GPIO located at other banks than first.
Test HW:
- Exynos4210 - Trats
- S5PC110 - goni
Signed-off-by: Lukasz Majewski l.majewski@samsung.com Signed-off-by: Kyungmin Park kyungmin.park@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com
arch/arm/include/asm/arch-exynos/gpio.h | 19 +++++++++++++++++++ arch/arm/include/asm/arch-s5pc1xx/gpio.h | 7 ++++++- drivers/gpio/s5p_gpio.c | 6 ++++-- 3 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h index 7a9bb90..fdb52fa 100644 --- a/arch/arm/include/asm/arch-exynos/gpio.h +++ b/arch/arm/include/asm/arch-exynos/gpio.h @@ -204,6 +204,25 @@ static inline unsigned int s5p_gpio_base(int nr) return 0; }
+static inline unsigned int s5p_gpio_part_max(int nr) +{
- if (cpu_is_exynos5()) {
if (nr < EXYNOS5_GPIO_PART1_MAX)
return 0;
else if (nr < EXYNOS5_GPIO_PART2_MAX)
return EXYNOS5_GPIO_PART1_MAX;
else
return EXYNOS5_GPIO_PART2_MAX;
- } else if (cpu_is_exynos4()) {
if (nr < EXYNOS4_GPIO_PART1_MAX)
return 0;
else
return EXYNOS4_GPIO_PART1_MAX;
- }
- return 0;
+} #endif
/* Pin configurations */ diff --git a/arch/arm/include/asm/arch-s5pc1xx/gpio.h b/arch/arm/include/asm/arch-s5pc1xx/gpio.h index 76b901b..00e498d 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/gpio.h +++ b/arch/arm/include/asm/arch-s5pc1xx/gpio.h @@ -143,7 +143,12 @@ static inline unsigned int s5p_gpio_base(int nr) return S5PC110_GPIO_BASE; }
-#define s5pc110_gpio_get_nr(bank, pin) \ +static inline unsigned int s5p_gpio_part_max(int nr) +{
- return 0;
+}
+#define s5pc110_gpio_get_nr(bank, pin) \ ((((((unsigned int)&(((struct s5pc110_gpio *)S5PC110_GPIO_BASE)->bank))\ - S5PC110_GPIO_BASE) / sizeof(struct s5p_gpio_bank)) \ * GPIO_PER_BANK) + pin) diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c index 47f3213..656bf4a 100644 --- a/drivers/gpio/s5p_gpio.c +++ b/drivers/gpio/s5p_gpio.c @@ -144,9 +144,11 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode) struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio) {
- int bank = gpio / GPIO_PER_BANK;
- bank *= sizeof(struct s5p_gpio_bank);
int bank;
unsigned g = gpio - s5p_gpio_part_max(gpio);
bank = g / GPIO_PER_BANK;
bank *= sizeof(struct s5p_gpio_bank); return (struct s5p_gpio_bank *) (s5p_gpio_base(gpio) + bank);
}
Do you have any comments about this fix?