Re: [U-Boot] Pull request: u-boot-riscv/master 20200724

On Fri, Jul 24, 2020 at 03:18:45PM +0800, uboot@andestech.com wrote:

Hi Tom,

Please pull some riscv updates:

• Fix SiFive HiFive Unleashed board booting failure problem.
• Enable SiFive fu540 PWM driver.
• Support SiFive fu540: SPI boot.
• Update OpenSBI used for RISC-V CI testing.
• Revert "riscv: Allow use of reset drivers".
• Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"".
• sysreset: syscon:
  • Don't assume default value for offset and mask property.
  • Support value property.
• qemu: Add syscon reboot and poweroff support.
• Fix SIFIVE debug serial dependency.
• Fix linking error when building u-boot-spl with no SMP support.
• AE350 use fdtdec_get_addr_size_auto_noparent to parse smc reg.
• Make memory node available to SPL in hifive-unleashed-a00-u-boot.dtsi
• SiFive fu540 avoid using hardcoded ram base and size.

Thanks Rick

https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/710968496

The following changes since commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7:

Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm (2020-07-23 15:56:06 -0400)

are available in the Git repository at:

git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git

for you to fetch changes up to ecb70bdb9f12b694e3a50895a759119b3fc27507:

ram: sifive: Avoid using hardcoded ram base and size (2020-07-24 14:56:29 +0800)

Applied to u-boot/master, thanks!