Re: [U-Boot] setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?

On 08/29/2017 03:47 AM, Joakim Tjernlund wrote:

As we are looking at PCI stuff ATM I would like to ask about PEX_GCLK_RATIO in E500 CPUs. I cannot find this is setup at all for E500 but I THINK this is required.

In 83xx one do: get_clocks(); /* Configure the PCIE controller core clock ratio */ out_le32(hose_cfg_base + PEX_GCLK_RATIO, (((bus ? gd->arch.pciexp2_clk : gd->arch.pciexp1_clk) / 1000000) * 16) / 333); udelay(1000000);

Any clues?

Jocke,

P2010 has SerDes. With PCIe, SerDes uses 100MHz reference clock. Please see reference manual "SerDes reference clock configuration".

York