
21 Jul
2014
21 Jul
'14
11:16 p.m.
On Tue, 2014-07-15 at 14:09 +0530, Prabhakar Kushwaha wrote:
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index 8b453cb..6c158f5 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -26,8 +26,6 @@ #define MAX_BANKS CONFIG_SYS_FSL_IFC_BANK_COUNT #define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */ -#define IFC_TIMEOUT_MSECS 10 /* Maximum number of mSecs to wait for IFC
NAND Machine */
struct fsl_ifc_ctrl;
@@ -292,7 +290,8 @@ static int fsl_ifc_run_command(struct mtd_info *mtd) struct fsl_ifc_mtd *priv = chip->priv; struct fsl_ifc_ctrl *ctrl = priv->ctrl; struct fsl_ifc *ifc = ctrl->regs;
- long long end_tick;
- u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
- u32 time_start; u32 eccstat[4]; int i;
Why are you changing the timeout from 10ms to 20ms?
-Scott