Hello Jagan,
пн, 18 дек. 2023 г. в 14:28, Jagan Teki jagan@amarulasolutions.com:
On Tue, Oct 17, 2023 at 12:35 PM Maksim Kiselev bigunclemax@gmail.com wrote:
If even one byte is lost due to Rx FIFO overflow then we will never exit the read loop. Because the (priv->rx != priv->rx_end) condition will be always true.
Let's check if Rx FIFO overflow occurred and exit the read loop in this case.
Signed-off-by: Maksim Kiselev bigunclemax@gmail.com
drivers/spi/designware_spi.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 1c7d0ca310..0f443bff8e 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -111,6 +111,15 @@ #define SR_TX_ERR BIT(5) #define SR_DCOL BIT(6)
+/* Bit fields in ISR, IMR, RISR, 7 bits */ +#define DW_SPI_INT_MASK GENMASK(5, 0) +#define DW_SPI_INT_TXEI BIT(0) +#define DW_SPI_INT_TXOI BIT(1) +#define DW_SPI_INT_RXUI BIT(2) +#define DW_SPI_INT_RXOI BIT(3) +#define DW_SPI_INT_RXFI BIT(4) +#define DW_SPI_INT_MSTI BIT(5)
Why do we need unused macros?
Actually DW_SPI_INT_RXOI is used. As for the other bits in DW_SPI_RISR, I decided to add them all to match a Linux driver.
We already have a lot of unused macro in this driver (ex. definitions for bits in CTRLR0_FRF, CTRLR0_MODE regs and so on).
So, what's a problem with adding the DW_SPI_RISR bits?
Cheers, Maksim
Jagan.