Clean up the macro defintions used to enable DIU (video) support on the MPC8610HPCD and the MPC5121ADS so that they look more like the P1022DS, which is newer.
Signed-off-by: Timur Tabi timur@freescale.com --- include/configs/MPC8610HPCD.h | 12 ++++-------- include/configs/mpc5121ads.h | 8 ++++---- 2 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 03ee394..8022895 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -21,12 +21,13 @@
#define CONFIG_SYS_TEXT_BASE 0xfff00000
-#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
/* video */ -#undef CONFIG_VIDEO +/* #define CONFIG_FSL_DIU_FB */
-#ifdef CONFIG_VIDEO +#ifdef CONFIG_FSL_DIU_FB +#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x2c000) +#define CONFIG_VIDEO #define CONFIG_CMD_BMP #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE @@ -88,8 +89,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW
-#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR+0x2c000) - /* DDR Setup */ #define CONFIG_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE @@ -494,9 +493,6 @@ #define CONFIG_WATCHDOG /* watchdog enabled */ #define CONFIG_SYS_WATCHDOG_FREQ 5000 /* Feed interval, 5s */
-/*DIU Configuration*/ -#define DIU_CONNECT_TO_DVI /* DIU controller connects to DVI encoder*/ - /* * Miscellaneous configurable options */ diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index f966325..01dd096 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -46,14 +46,15 @@ */ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC512X 1 /* MPC512X family */ -#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
#define CONFIG_SYS_TEXT_BASE 0xFFF00000
/* video */ -#undef CONFIG_VIDEO +/* #define CONFIG_FSL_DIU_FB */
-#ifdef CONFIG_VIDEO +#ifdef CONFIG_FSL_DIU_FB +#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_IMMR + 0x2100) +#define CONFIG_VIDEO #define CONFIG_CMD_BMP #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE @@ -74,7 +75,6 @@ #define CONFIG_MISC_INIT_R
#define CONFIG_SYS_IMMR 0x80000000 -#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_IMMR+0x2100)
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ #define CONFIG_SYS_MEMTEST_END 0x00400000