Add the SPI / UART switch logic into the Tegra2 SPI driver so that it can co-exist with the NS16550 UART.
Signed-off-by: Simon Glass sjg@chromium.org --- drivers/spi/tegra2_spi.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/tegra2_spi.c b/drivers/spi/tegra2_spi.c index c8c20aa..83b36b3 100644 --- a/drivers/spi/tegra2_spi.c +++ b/drivers/spi/tegra2_spi.c @@ -24,6 +24,7 @@ #include <common.h>
#include <malloc.h> +#include <ns16550.h> /* for NS16550_drain and NS16550_clear */ #include <spi.h> #include <asm/io.h> #include <asm/gpio.h> @@ -31,6 +32,7 @@ #include <asm/arch/clock.h> #include <asm/arch/pinmux.h> #include <asm/arch/tegra2_spi.h> +#include "uart-spi-fix.h"
int spi_cs_is_valid(unsigned int bus, unsigned int cs) { @@ -104,6 +106,12 @@ int spi_claim_bus(struct spi_slave *slave)
void spi_release_bus(struct spi_slave *slave) { + /* + * We can't release UART_DISABLE and set pinmux to UART4 here since + * some code (e,g, spi_flash_probe) uses printf() while the SPI + * bus is held. That is arguably bad, but it has the advantage of + * already being in the source tree. + */ }
void spi_cs_activate(struct spi_slave *slave) @@ -111,6 +119,8 @@ void spi_cs_activate(struct spi_slave *slave) struct spi_tegra *spi = (struct spi_tegra *)TEGRA2_SPI_BASE; u32 val;
+ spi_enable(); + /* CS is negated on Tegra, so drive a 1 to get a 0 */ val = readl(&spi->command); writel(val | SPI_CMD_CS_VAL, &spi->command);