On 6/15/2023 8:37 PM, Camelia Groza wrote:
Pick up the serial node descriptions from Linux for the ls1043ardb board and its dependencies. Including the fsl,qoriq-clockgen.h and arm-gic.h headers forces us to change the include directives to explicitly go through the C preprocessor for all boards in the ls1043a SoC family.
Better add the tag or commit of linux kernel that you sync from.
Other than that, Acked-by: Peng Fan peng.fan@nxp.com
Signed-off-by: Camelia Groza camelia.groza@nxp.com
arch/arm/dts/fsl-ls1043a-qds.dtsi | 2 +- arch/arm/dts/fsl-ls1043a-rdb.dts | 6 +++++- arch/arm/dts/fsl-ls1043a.dtsi | 16 +++++++++++----- 3 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi b/arch/arm/dts/fsl-ls1043a-qds.dtsi index 884bdad196b3..5e02cd91d75f 100644 --- a/arch/arm/dts/fsl-ls1043a-qds.dtsi +++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi @@ -7,7 +7,7 @@
- Mingkai Hu Mingkai.hu@freescale.com
*/
-/include/ "fsl-ls1043a.dtsi" +#include "fsl-ls1043a.dtsi"
/ { model = "LS1043A QDS Board"; diff --git a/arch/arm/dts/fsl-ls1043a-rdb.dts b/arch/arm/dts/fsl-ls1043a-rdb.dts index 9e7c79fd2b98..f5b3bb68b3db 100644 --- a/arch/arm/dts/fsl-ls1043a-rdb.dts +++ b/arch/arm/dts/fsl-ls1043a-rdb.dts @@ -9,13 +9,17 @@ */
/dts-v1/; -/include/ "fsl-ls1043a.dtsi" +#include "fsl-ls1043a.dtsi"
/ { model = "LS1043A RDB Board";
aliases { spi1 = &dspi0;
serial0 = &duart0;serial1 = &duart1;serial2 = &duart2;serial3 = &duart3; };};
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index 4960973a6035..21643a1d951f 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -8,7 +8,9 @@
- Mingkai Hu Mingkai.hu@freescale.com
*/
-/include/ "skeleton64.dtsi" +#include "skeleton64.dtsi" +#include <dt-bindings/clock/fsl,qoriq-clockgen.h> +#include <dt-bindings/interrupt-controller/arm-gic.h>
/ { compatible = "fsl,ls1043a"; @@ -223,28 +225,32 @@ compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0500 0x0 0x100>; interrupts = <0 54 0x4>;
clocks = <&clockgen 4 0>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLLQORIQ_CLK_PLL_DIV(1)>;};
duart1: serial@21c0600 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0600 0x0 0x100>; interrupts = <0 54 0x4>;
clocks = <&clockgen 4 0>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLLQORIQ_CLK_PLL_DIV(1)>;};
duart2: serial@21d0500 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x0 0x21d0500 0x0 0x100>; interrupts = <0 55 0x4>;
clocks = <&clockgen 4 0>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLLQORIQ_CLK_PLL_DIV(1)>;};
duart3: serial@21d0600 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x0 0x21d0600 0x0 0x100>; interrupts = <0 55 0x4>;
clocks = <&clockgen 4 0>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLLQORIQ_CLK_PLL_DIV(1)>;};
lpuart0: serial@2950000 {