The link register value can be required on some boards (e.g. FEL mode on sunxi) so use a branch instruction to jump to save_boot_params() instead of a branch link.
This requires a branch back to save_boot_params_ret so adjust the users to deal with this. For exynos just drop the function since it doesn't do anything.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: - Change save_boot_params() to not use lr for return - Fix up existing save_boot_params() functions for new API
arch/arm/cpu/armv7/exynos/spl_boot.c | 1 - arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 2 +- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 2 +- arch/arm/cpu/armv7/start.S | 7 +++++-- arch/arm/include/asm/system.h | 15 +++++++++++++++ board/nokia/rx51/lowlevel_init.S | 3 ++- 6 files changed, 24 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/spl_boot.c b/arch/arm/cpu/armv7/exynos/spl_boot.c index bc237c9..c7f943e 100644 --- a/arch/arm/cpu/armv7/exynos/spl_boot.c +++ b/arch/arm/cpu/armv7/exynos/spl_boot.c @@ -309,4 +309,3 @@ void board_init_r(gd_t *id, ulong dest_addr) while (1) ; } -void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {} diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S index 86c0e42..e19c7ae 100644 --- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S @@ -19,7 +19,7 @@ ENTRY(save_boot_params) ldr r1, =OMAP_SRAM_SCRATCH_BOOT_PARAMS str r0, [r1] - bx lr + b save_boot_params_ret ENDPROC(save_boot_params)
ENTRY(set_pl310_ctrl_reg) diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S index 78577b1..80cb263 100644 --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S @@ -23,7 +23,7 @@ ENTRY(save_boot_params) ldr r5, [r0, #0x4] and r5, r5, #0xff str r5, [r4] - bx lr + b save_boot_params_ret ENDPROC(save_boot_params) #endif
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 70048c1..9b49ece 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -31,9 +31,12 @@ *************************************************************************/
.globl reset + .globl save_boot_params_ret
reset: - bl save_boot_params + /* Allow the board to save important registers */ + b save_boot_params +save_boot_params_ret: /* * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode, * except if in HYP mode already @@ -96,7 +99,7 @@ ENDPROC(c_runtime_cpu_setup) * *************************************************************************/ ENTRY(save_boot_params) - bx lr @ back to my caller + b save_boot_params_ret @ back to my caller ENDPROC(save_boot_params) .weak save_boot_params
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 89f2294..7820486 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -142,6 +142,21 @@ void flush_l3_cache(void);
#ifndef __ASSEMBLY__
+/** + * save_boot_params() - Save boot parameters before starting reset sequence + * + * If you provide this function it will be called immediately U-Boot starts, + * both for SPL and U-Boot proper. + * + * All registers are unchanged from U-Boot entry. No registers need be + * preserved. + * + * This is not a normal C function. There is no stack. Return by branching to + * save_boot_params_ret. + * + * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3); + */ + #define isb() __asm__ __volatile__ ("" : : : "memory")
#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); diff --git a/board/nokia/rx51/lowlevel_init.S b/board/nokia/rx51/lowlevel_init.S index e252909..9d4ea1b 100644 --- a/board/nokia/rx51/lowlevel_init.S +++ b/board/nokia/rx51/lowlevel_init.S @@ -37,7 +37,8 @@ ih_magic: /* IH_MAGIC in big endian from include/image.h */
.global save_boot_params save_boot_params: - + /* Get return address */ + ldr lr, =save_boot_params_ret
/* Copy valid attached kernel to address KERNEL_ADDRESS */