Hi,
-----Original Message----- From: Marek Vasut marex@denx.de Sent: Saturday, September 21, 2024 9:48 PM To: Chee, Tien Fong tien.fong.chee@intel.com; u-boot@lists.denx.de Cc: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Meng, Tingting tingting.meng@intel.com; Yuslaimi, Alif Zakuan alif.zakuan.yuslaimi@intel.com; Hea, Kok Kiang kok.kiang.hea@intel.com Subject: Re: [PATCH v1 02/20] arm: socfpga: Add support for agilex5 clock manager
On 9/20/24 9:02 AM, tien.fong.chee@intel.com wrote:
From: Tien Fong Chee tien.fong.chee@intel.com
Adding mechanism to retrieve base address for Agilex5 Clock Mananger.
Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com
Can this be turned into clock driver and probe from DT ?
I will remove this patch, because I just noticed the clk driver for Agilex 5 is already in driver model (DT).
Regards, Tien Fong.