
22 Mar
2016
22 Mar
'16
4:33 p.m.
On 01/27/2016 11:46 PM, shh.xie@gmail.com wrote:
From: Shaohui Xie Shaohui.Xie@nxp.com
To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins polarity by setting IRQCR register, because AQR405 interrupt is low active but GIC accepts high active.
Signed-off-by: Shaohui Xie Shaohui.Xie@nxp.com
changes in v2:
- move Interrupt register offset define to immap_lsch3.h.
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 ++++ board/freescale/ls2080ardb/ls2080ardb.c | 4 ++++ include/configs/ls2080ardb.h | 1 + 3 files changed, 9 insertions(+)
Applied to u-boot-fsl-qoriq, awaiting upstream.
Thanks.
York