6 Aug
2017
6 Aug
'17
7:18 p.m.
For the RK3368, we use a multi-stage boot-process consisting of the following:
- TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it)
- SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot)
- ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world
- full U-Boot
TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses.
This commit sets up the configuration to run:
- TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered)
- SPL from DRAM at 0x0
- U-Boot from DRAM at 0x200000
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Reviewed-by: Simon Glass sjg@chromium.org
Changes in v4: None Changes in v3: None Changes in v2: None
include/configs/rk3368_common.h | 11 +++++++++++ 1 file changed, 11 insertions(+)
Applied to u-boot-rockchip, thanks!