Introduce accessor iocsr_get_config_table() for retrieving IOCSR config tables. This patch is again trimming down the namespace polution.
The IOCSR config tables are used only by scan manager, they are generated by qts and are board specific. Before this patch, the approach to use these tables in scan manager was to define an extern variable to silence the compiler and compile board-specific iocsr_config.c into U-Boot which defined those extern variables. Furthermore, since these are tables and the scan manager needs to know the size of those tables, iocsr_config.h is included build-wide.
This patch wraps all this into a single accessor which takes the scan chain ID and returns pointer to the table and it's size. All this is wrapped in wrap_iocsr_config.c board-specific file. The file includes the iocsr_config.c (!) to access the original tables and transitively iocsr_config.h . It is thus no longer necessary to include iocsr_config.h build-wide and the namespace polution is trimmed some more.
Signed-off-by: Marek Vasut marex@denx.de --- arch/arm/mach-socfpga/include/mach/scan_manager.h | 12 ++----- arch/arm/mach-socfpga/scan_manager.c | 30 +++++------------ board/altera/socfpga/Makefile | 2 +- board/altera/socfpga/qts/Makefile | 2 +- board/altera/socfpga/wrap_iocsr_config.c | 41 +++++++++++++++++++++++ include/configs/socfpga_arria5.h | 1 - include/configs/socfpga_cyclone5.h | 1 - 7 files changed, 54 insertions(+), 35 deletions(-) create mode 100644 board/altera/socfpga/wrap_iocsr_config.c
diff --git a/arch/arm/mach-socfpga/include/mach/scan_manager.h b/arch/arm/mach-socfpga/include/mach/scan_manager.h index 3602ace..94ad50b 100644 --- a/arch/arm/mach-socfpga/include/mach/scan_manager.h +++ b/arch/arm/mach-socfpga/include/mach/scan_manager.h @@ -68,15 +68,9 @@ struct socfpga_scan_manager { #define SCANMGR_STAT_ACTIVE_GET(x) (((x) & 0x80000000) >> 31) #define SCANMGR_STAT_WFIFOCNT_GET(x) (((x) & 0x70000000) >> 28)
-extern const uint32_t iocsr_scan_chain0_table[ - ((CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH / 32) + 1)]; -extern const uint32_t iocsr_scan_chain1_table[ - ((CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH / 32) + 1)]; -extern const uint32_t iocsr_scan_chain2_table[ - ((CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH / 32) + 1)]; -extern const uint32_t iocsr_scan_chain3_table[ - ((CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH / 32) + 1)]; - int scan_mgr_configure_iocsr(void); +int iocsr_get_config_table(const unsigned int chain_id, + const unsigned long **table, + unsigned int *table_len);
#endif /* _SCAN_MANAGER_H_ */ diff --git a/arch/arm/mach-socfpga/scan_manager.c b/arch/arm/mach-socfpga/scan_manager.c index 135f9f3..ec0c630 100644 --- a/arch/arm/mach-socfpga/scan_manager.c +++ b/arch/arm/mach-socfpga/scan_manager.c @@ -48,29 +48,15 @@ static int scan_mgr_io_scan_chain_prg(const unsigned int io_scan_chain_id) uint32_t io_program_iter; uint32_t io_scan_chain_data_residual; uint32_t residual; - uint32_t i; + uint32_t i, ret; uint32_t index = 0; - uint32_t io_scan_chain_len_in_bits, - const uint32_t *iocsr_scan_chain; - - switch (io_scan_chain_id) { - case 0: - io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH; - iocsr_scan_chain = iocsr_scan_chain0_table; - break; - case 1: - io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH; - iocsr_scan_chain = iocsr_scan_chain1_table; - break; - case 2: - io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH; - iocsr_scan_chain = iocsr_scan_chain2_table; - break; - case 3: - io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH; - iocsr_scan_chain = iocsr_scan_chain3_table; - break; - } + uint32_t io_scan_chain_len_in_bits; + const unsigned long *iocsr_scan_chain; + + ret = iocsr_get_config_table(io_scan_chain_id, &iocsr_scan_chain, + &io_scan_chain_len_in_bits); + if (ret) + return 1;
/* * De-assert reinit if the IO scan chain is intended for HIO. In diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile index f541227..7cd4ef9 100644 --- a/board/altera/socfpga/Makefile +++ b/board/altera/socfpga/Makefile @@ -7,4 +7,4 @@ #
obj-y := socfpga.o wrap_pll_config.o -obj-$(CONFIG_SPL_BUILD) += qts/ +obj-$(CONFIG_SPL_BUILD) += qts/ wrap_iocsr_config.o diff --git a/board/altera/socfpga/qts/Makefile b/board/altera/socfpga/qts/Makefile index dbcedd8..cd8fecc 100644 --- a/board/altera/socfpga/qts/Makefile +++ b/board/altera/socfpga/qts/Makefile @@ -4,4 +4,4 @@ # SPDX-License-Identifier: GPL-2.0+ #
-obj-y += pinmux_config.o iocsr_config.o +obj-y += pinmux_config.o diff --git a/board/altera/socfpga/wrap_iocsr_config.c b/board/altera/socfpga/wrap_iocsr_config.c new file mode 100644 index 0000000..49e9228 --- /dev/null +++ b/board/altera/socfpga/wrap_iocsr_config.c @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2015 Marek Vasut marex@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <errno.h> +#include <asm/arch/clock_manager.h> +/* + * Yes, dear reader, we're including a C file here, this is no mistake :-) + */ +#include "qts/iocsr_config.c" + +int iocsr_get_config_table(const unsigned int chain_id, + const unsigned long **table, + unsigned int *table_len) +{ + switch (chain_id) { + case 0: + *table = iocsr_scan_chain0_table; + *table_len = CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH; + break; + case 1: + *table = iocsr_scan_chain1_table; + *table_len = CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH; + break; + case 2: + *table = iocsr_scan_chain2_table; + *table_len = CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH; + break; + case 3: + *table = iocsr_scan_chain3_table; + *table_len = CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH; + break; + default: + return -EINVAL; + } + + return 0; +} diff --git a/include/configs/socfpga_arria5.h b/include/configs/socfpga_arria5.h index 861aeed..758912c 100644 --- a/include/configs/socfpga_arria5.h +++ b/include/configs/socfpga_arria5.h @@ -8,7 +8,6 @@
#include <asm/arch/socfpga_base_addrs.h> #include "../../board/altera/socfpga/qts/pinmux_config.h" -#include "../../board/altera/socfpga/qts/iocsr_config.h"
/* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 75bc162..e7938f5 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -8,7 +8,6 @@
#include <asm/arch/socfpga_base_addrs.h> #include "../../board/altera/socfpga/qts/pinmux_config.h" -#include "../../board/altera/socfpga/qts/iocsr_config.h"
/* U-Boot Commands */ #define CONFIG_SYS_NO_FLASH