Hello Simon,
On 10/15/2014 10:37 AM, Simon Glass wrote:
The pinctrl bindings used by Linux are an incomplete description of the hardware. It is possible in most cases to determine the register address of each, but not in all cases. By adding an additional property we can fix this, and avoid adding a table to U-Boot for every single Exynos SOC.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v9: None Changes in v8:
- Add missing special case reg property for exynos5420 GPX0
Changes in v7: None Changes in v6:
- Move U-Boot changes into their own file
- Use exynos54xx everywhere instead of exynos5420
Changes in v5: None Changes in v4: None
arch/arm/dts/exynos4210-pinctrl-uboot.dtsi | 27 ++++++++++++++++++ arch/arm/dts/exynos4210-pinctrl.dtsi | 2 ++ arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 46 ++++++++++++++++++++++++++++++ arch/arm/dts/exynos4x12-pinctrl.dtsi | 2 ++ arch/arm/dts/exynos5250-pinctrl-uboot.dtsi | 40 ++++++++++++++++++++++++++ arch/arm/dts/exynos5250-pinctrl.dtsi | 2 ++ arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi | 40 ++++++++++++++++++++++++++ arch/arm/dts/exynos54xx-pinctrl.dtsi | 2 ++ arch/arm/dts/exynos54xx.dtsi | 1 + 9 files changed, 162 insertions(+) create mode 100644 arch/arm/dts/exynos4210-pinctrl-uboot.dtsi create mode 100644 arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi create mode 100644 arch/arm/dts/exynos5250-pinctrl-uboot.dtsi create mode 100644 arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
... snip ...
diff --git a/arch/arm/dts/exynos4210-pinctrl.dtsi b/arch/arm/dts/exynos4210-pinctrl.dtsi index bda17f7..87f162b 100644 --- a/arch/arm/dts/exynos4210-pinctrl.dtsi +++ b/arch/arm/dts/exynos4210-pinctrl.dtsi @@ -14,6 +14,8 @@
- published by the Free Software Foundation.
*/
+#include "exynos4210-pinctrl-uboot.dtsi"
- / { pinctrl@11400000 { gpa0: gpa0 {
diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi new file mode 100644 index 0000000..c02796d --- /dev/null +++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi @@ -0,0 +1,46 @@ +/*
- U-Boot additions to enable a generic Exynos GPIO driver
- Copyright (c) 2014 Google, Inc
- */
+/{
- pinctrl_0: pinctrl@11400000 {
#address-cells = <1>;#size-cells = <0>;
The first issue with Exynos GPIO driver starts here. If you put pinctrl* node data in a separated file, then the order of nodes in dtb is changed. So for the pinctrl 0, the first subnode is gpf0, instead of gpa0. And the same is for other pinctrls.
This means that function gpio_exynos_bind(), which expects proper subnodes order assign wrong base addresses to some GPIO pins.
Move "reg" properties into arch/arm/dts/exynos4x12-pinctrl.dtsi fixes this issue. But in this case, the file *-pinctrl-uboot.dtsi is quite useless - since the cells size can be moved to pinctrl.dtsi too.
This probably will touch all *pinctrl-uboot.dtsi files.