Dear y@tx30smr01.am.freescale.net,
In message <1372661036-11828-1-git-send-email-y> you wrote:
From: Mingkai Hu Mingkai.Hu@freescale.com
The Freescale C29x family is a high performance crypto co-processor. It combines a single e500v2 core with necessary SEC engine. There're three SoC types(C291, C292, C293) with the following features:
- 512K L2 Cache/SRAM and 512 KB platform SRAM
- DDR3/DDR3L 32bit DDR controller
- One PCI express (x1, x2, x4) Gen 2.0 Controller
- Trust Architecture 2.0
- SEC6.0 engine
Signed-off-by: Mingkai Hu Mingkai.Hu@freescale.com Signed-off-by: Po Liu Po.Liu@freescale.com
What exactly is this? A plain resend of the patch submitted on April 24? Or a resend of the patch of June 26? Or a new version? If so, what exactly has been changed?
Adding a patch version to the Subject line and a history of changes to the comment section (as documented for example here [1]) is not something you can just ignore - this is a mandatory requirement to have your patches accepted.
[1] http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions
--- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -626,6 +626,18 @@ #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
+#elif defined(CONFIG_C29X)
All other names in this list use the form CONFIG_PPC_<name>, and then they define a core ID. Can youy please do the same? And please, keep this list sorted.
--- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2147,6 +2147,11 @@ typedef struct ccsr_gur { #ifdef CONFIG_MPC8536 #define MPC85xx_PORPLLSR_DDR_RATIO 0x3e000000 #define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT 25 +#elif defined(CONFIG_C29X)
Can we please sort this list of #if defined() lines?
Thanks!
Best regards,
Wolfgang Denk