
Kumar Gala wrote:
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index eb256e5..d01311d 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -69,31 +69,52 @@ void cpu_init_f (volatile immap_t * im)
#ifdef CFG_ACR_PIPE_DEP /* Arbiter pipeline depth */
- im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | (3 << ACR_PIPE_DEP_SHIFT);
im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | (CFG_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT); #endif
#ifdef CFG_SPCR_TSEC1EP /* TSEC1 Emergency priority */
- im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSEC1EP) | (3 << SPCR_TSEC1EP_SHIFT);
im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSEC1EP) | (CFG_SPCR_TSEC1EP << SPCR_TSEC1EP_SHIFT); #endif
#ifdef CFG_SPCR_TSEC2EP /* TSEC2 Emergency priority */
- im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSEC2EP) | (3 << SPCR_TSEC2EP_SHIFT);
- im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSEC2EP) | (CFG_SPCR_TSEC2EP << SPCR_TSEC2EP_SHIFT); #endif
+#ifdef CONFIG_MPC834X #ifdef CFG_SCCR_TSEC1CM /* TSEC1 clock mode */
- im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC1CM) | (1 << SCCR_TSEC1CM_SHIFT);
- im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC1CM) | (CFG_SCCR_TSEC1CM << SCCR_TSEC1CM_SHIFT); #endif #ifdef CFG_SCCR_TSEC2CM /* TSEC2 & I2C1 clock mode */
- im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC2CM) | (1 << SCCR_TSEC2CM_SHIFT);
- im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC2CM) | (CFG_SCCR_TSEC2CM << SCCR_TSEC2CM_SHIFT);
+#endif +#ifdef CFG_SCCR_USBMPHCM
- /* USB MPH clock mode */
- im->clk.sccr = (im->clk.sccr & ~SCCR_USBMPHCM) | (CFG_SCCR_USBMPHCM << SCCR_USBMPHCM_SHIFT);
+#endif +#endif /* CONFIG_MPC834X */
+#ifdef CFG_SCCR_PCICM
- /* PCI & DMA clock mode */
- im->clk.sccr = (im->clk.sccr & ~SCCR_PCICM) | (CFG_SCCR_PCICM << SCCR_PCICM_SHIFT);
+#endif
+#ifdef CFG_SCCR_USBDRCM
- /* USB DR clock mode */
- im->clk.sccr = (im->clk.sccr & ~SCCR_USBDRCM) | (CFG_SCCR_USBDRCM << SCCR_USBDRCM_SHIFT);
+#endif
+#ifdef CFG_SCCR_ENCCM
/* Encryption clock mode */
im->clk.sccr = (im->clk.sccr & ~SCCR_ENCCM) | (CFG_SCCR_ENCCM << SCCR_PCICM_SHIFT); #endif
#ifdef CFG_ACR_RPTCNT /* Arbiter repeat count */
- im->arbiter.acr = ((im->arbiter.acr & ~(ACR_RPTCNT)) | (3 << ACR_RPTCNT_SHIFT));
- im->arbiter.acr = ((im->arbiter.acr & ~(ACR_RPTCNT)) | (CFG_ACR_RPTCNT << ACR_RPTCNT_SHIFT)); #endif
This patch is good. Kim, please apply. It fixes bug 292.
However, ....
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 5bed2d0..d06b51d 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -60,17 +60,6 @@ #endif #endif
-#define CFG_SCCR_INIT (SCCR_DEFAULT & (~SCCR_CLK_MASK)) -#define CFG_SCCR_TSEC1CM SCCR_TSEC1CM_1 /* TSEC1 clock setting */ -#define CFG_SCCR_TSEC2CM SCCR_TSEC2CM_1 /* TSEC2 clock setting */ -#define CFG_SCCR_ENCCM SCCR_ENCCM_3 /* ENC clock setting */ -#define CFG_SCCR_USBCM SCCR_USBCM_3 /* USB clock setting */ -#define CFG_SCCR_VAL ( CFG_SCCR_INIT \
| CFG_SCCR_TSEC1CM \
| CFG_SCCR_TSEC2CM \
| CFG_SCCR_ENCCM \
| CFG_SCCR_USBCM )
I think your patch omits the new values of CFG_SCCR_TSEC1CM, CFG_SCCR_TSEC2CM, CFG_SCCR_ENCCM, and CFG_SCCR_USBCM. Your changelog says these values are bogus, but without defining the macros, the code in cpu_init_f() won't be compiled.
+#define CFG_SCCR_TSEC1CM 1 +#define CFG_SCCR_TSEC2CM 1 +#define CFG_SCCR_ENCCM 3 +#define CFG_SCCR_USBCM 3
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 728083b..ed03577 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -57,17 +57,6 @@ */ #define CFG_LCRR (LCRR_DBYP | LCRR_CLKDIV_8)
-#define CFG_SCCR_INIT (SCCR_DEFAULT & (~SCCR_CLK_MASK)) -#define CFG_SCCR_TSEC1CM SCCR_TSEC1CM_1 /* TSEC1 clock setting */ -#define CFG_SCCR_TSEC2CM SCCR_TSEC2CM_1 /* TSEC2 clock setting */ -#define CFG_SCCR_ENCCM SCCR_ENCCM_3 /* ENC clock setting */ -#define CFG_SCCR_USBCM SCCR_USBCM_3 /* USB clock setting */
Same here
+#define CFG_SCCR_TSEC1CM 1 +#define CFG_SCCR_TSEC2CM 1 +#define CFG_SCCR_ENCCM 3 +#define CFG_SCCR_USBCM 3
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 1876c61..321d3ce 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -63,17 +63,6 @@ #endif #endif
-#define CFG_SCCR_INIT (SCCR_DEFAULT & (~SCCR_CLK_MASK)) -#define CFG_SCCR_TSEC1CM SCCR_TSEC1CM_1 /* TSEC1 clock setting */ -#define CFG_SCCR_TSEC2CM SCCR_TSEC2CM_1 /* TSEC2 clock setting */ -#define CFG_SCCR_ENCCM SCCR_ENCCM_3 /* ENC clock setting */ -#define CFG_SCCR_USBCM SCCR_USBCM_3 /* USB clock setting */
And here
+#define CFG_SCCR_TSEC1CM 1 +#define CFG_SCCR_TSEC2CM 1 +#define CFG_SCCR_ENCCM 3 +#define CFG_SCCR_USBCM 3
You can also probably get rid of these macros in mpc83xx.h:
#define SCCR_ENCCM_0 0x00000000 #define SCCR_ENCCM_1 0x01000000 #define SCCR_ENCCM_2 0x02000000 #define SCCR_ENCCM_3 0x03000000 #define SCCR_TSEC1CM_0 0x00000000 #define SCCR_TSEC1CM_1 0x40000000 #define SCCR_TSEC1CM_2 0x80000000 #define SCCR_TSEC1CM_3 0xC0000000 #define SCCR_TSEC2CM_0 0x00000000 #define SCCR_TSEC2CM_1 0x10000000 #define SCCR_TSEC2CM_2 0x20000000 #define SCCR_TSEC2CM_3 0x30000000 #define SCCR_USBCM_0 0x00000000 #define SCCR_USBCM_1 0x00500000 #define SCCR_USBCM_2 0x00A00000 #define SCCR_USBCM_3 0x00F00000