Re: [U-Boot] [PATCH v2 1/7] usb: xhci-rockchip: add rockchip dwc3 controller driver

On 08/19/2016 09:19 AM, Kever Yang wrote:

From: MengDongyang daniel.meng@rock-chips.com

This patch add support for rockchip dwc3 controller, which corresponding to the two type-C port on rk3399 evb. Only support usb2.0 currently for we have not enable the usb3.0 phy driver and PD(fusb302) driver.

Signed-off-by: MengDongyang daniel.meng@rock-chips.com Signed-off-by: Kever Yang kever.yang@rock-chips.com

Hi,

[...]

+static void rockchip_dwc3_phy_setup(struct dwc3 *dwc3_reg,

• 		    struct rockchip_xhci *rockchip)
  

+{

• u32 reg;
• const void *blob = gd->fdt_blob;
• struct udevice *dev = rockchip->dev;
• const struct fdt_property *prop;
• const u32 *data;
• reg = readl(&dwc3_reg->g_usb3pipectl[0]);
• /* To do set dwc3 usb3 pipe control */
• writel(reg, &dwc3_reg->g_usb3pipectl[0]);

This read - do nothing - write looks suspicious. Is this needed ?

Also, drop the newline after the comment, it's useless, both above and below here.

• /* Set dwc3 usb2 phy config */
• reg = readl(&dwc3_reg->g_usb2phycfg[0]);
• prop = fdt_get_property(blob, dev->of_offset,

• 		"snps,dis-enblslpm-quirk", NULL);
  

• if (prop)

• reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
  

• prop = fdt_get_property(blob, dev->of_offset,

• 		"snps,phyif-utmi-bits", NULL);
  

• data = (u32 *)prop->data;
• if (fdt32_to_cpu(*data) == 16) {

• reg |= DWC3_GUSB2PHYCFG_PHYIF;
  

• reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
  

• reg |= 5 << DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET;
  

• } else if (fdt32_to_cpu(*data) == 8) {

• reg &= ~DWC3_GUSB2PHYCFG_PHYIF;
  

• reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
  

• reg |= 9 << DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET;
  

• }
• prop = fdt_get_property(blob, dev->of_offset,

• 		"snps,dis-u2-freeclk-exists-quirk", NULL);
  

• if (prop)

• reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
  

• prop = fdt_get_property(blob, dev->of_offset,

• 		"snps,dis-u2-susphy-quirk", NULL);
  

• if (prop)

• reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
  

• writel(reg, &dwc3_reg->g_usb2phycfg[0]);

+}

[...]