Kumar Gala schrieb:
On Dec 9, 2008, at 12:01 PM, Andre Schwarz wrote:
Jon Loeliger schrieb:
On Mon, 2008-12-08 at 18:02 +0100, Andre Schwarz wrote:
Kim,
I'd like to change my DDR setup code since it looks like my computed values are not perfectly stable on our 8343 based board.
This implies using a fake SPD and the related code to set up the controller.
Is the "new" common FSL DDR setup code (cpu/mpc8xxx/ddr/*) stable for 83xx or shall I stick to cpu/mpc83xx/spd_sdram.c for a while ?
The new, common DDR code in use by the FSL boards does not yet cover the 83xx family, though the plan is to eventually do so.
Patches in that direction, are, naturally, welcome... :-)
jdl
Is anybody working on this ? The spd_sdram code lacks support for 3 bank adress bits and various termination schemes which are essential for tiny boards with soldered memory.
Of course I could contribute for the 8343. But I don't now about the "others" (85xx/86x) in detail and don't want to scatter #ifdefs all over the code ...
regards, André
I don't believe anyone is currently working on getting the new ddr code to be used w/83xx. Feel free to submit patches that does this and we will review them as they are posted.
- k
After spending few hours it seems to work basically. This is what I've done :
- add mpc8xxx(ddr/libddr.a to top level Makefile for 83xx - created mpc83xx/ddr-gen2.c and ported to meet ddr83xx_t - created board specific ddr.c for SPD accessor and basic setup. - created board specific ddr2_spd_eeprom_t (soldered memory)
The board config got these #defines :
#define CONFIG_FSL_DDR2 #define CONFIG_DDR_SPD #define CONFIG_NUM_DDR_CONTROLLERS 1 -> this should go into mpc83xx header #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1
Since spd_sdram.o is always build (mpc83xx/Makefile) and the code is also activated by CONFIG_SPD_EEPROM we should find a reasonable way to switch between "old" and "new" DDR code by some kind of #define.
Is this the way to go ?
regards, André
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