Dear Andy Fleming,
Pinging you on this, again. Also, I've now moved the patch to Marek's queue, instead of mine.
Thanks! Did the FSL silicon team respond already?
On Sun, Feb 26, 2012 at 8:44 PM, Liu Shengzhou-B36685
B36685@freescale.com wrote:
-----Original Message----- From: Marek Vasut [mailto:marex@denx.de] Sent: Monday, February 27, 2012 7:13 AM To: u-boot@lists.denx.de Cc: Liu Shengzhou-B36685 Subject: Re: [U-Boot] [PATCH] powerpc/usb: fix bug of CPU halt when missing USB PHY clock
when missing USB PHY clock and issuing "usb start" at u-boot prompt, writing to or_portsc register will cause CPU halt. We should check USBGP[PHY_CLK_VALID] bit at the first time in ehci_hcd_init() to
avoid
CPU hang in this case.
Signed-off-by: Shengzhou Liu Shengzhou.Liu@freescale.com
drivers/usb/host/ehci-fsl.c | 22 +++++++++++++++++++--- 1 files changed, 19 insertions(+), 3 deletions(-)
Hi,
what's the status of this patch/patchset?
Thanks M
Currently we found that usb CTRL_PHY_CLK_VALID bit breaks on P1022 platform, which not contains this bit. - P1023/P3041/P5020 etc, have this bit
- P3060/4080/PSC913x do have this bit, but not mentioned in RM.
- P1022(perhaps and other) has no this bit
I'm waiting for the response from FSL silicon team to confirm whether there is other platform not including this bit or not, so this patch maybe have to be pending until I get confirmation.
Thanks, Shengzhou
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Best regards, Marek Vasut