From: Wang Dongsheng dongsheng.wang@freescale.com
timer_wait is moved from sunxi/psci_sun7i.S, and it can be converted completely into a reusable armv7 generic timer. LS1021A will use it as well.
Signed-off-by: Wang Dongsheng dongsheng.wang@freescale.com
diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S index d4cb51e..4ff46e4 100644 --- a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S +++ b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S @@ -18,6 +18,8 @@ */
#include <config.h> + +#include <asm/arch-armv7/generictimer.h> #include <asm/gic.h> #include <asm/macro.h> #include <asm/psci.h> @@ -43,26 +45,6 @@ #define GICD_BASE 0x1c81000 #define GICC_BASE 0x1c82000
-.macro timer_wait reg, ticks - @ Program CNTP_TVAL - movw \reg, #(\ticks & 0xffff) - movt \reg, #(\ticks >> 16) - mcr p15, 0, \reg, c14, c2, 0 - isb - @ Enable physical timer, mask interrupt - mov \reg, #3 - mcr p15, 0, \reg, c14, c2, 1 - @ Poll physical timer until ISTATUS is on -1: isb - mrc p15, 0, \reg, c14, c2, 1 - ands \reg, \reg, #4 - bne 1b - @ Disable timer - mov \reg, #0 - mcr p15, 0, \reg, c14, c2, 1 - isb -.endm - .globl psci_fiq_enter psci_fiq_enter: push {r0-r12} diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S index bbfeec8..e15d587 100644 --- a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S +++ b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S @@ -18,6 +18,8 @@ */
#include <config.h> + +#include <asm/arch-armv7/generictimer.h> #include <asm/gic.h> #include <asm/macro.h> #include <asm/psci.h> @@ -43,26 +45,6 @@ #define GICD_BASE 0x1c81000 #define GICC_BASE 0x1c82000
-.macro timer_wait reg, ticks - @ Program CNTP_TVAL - movw \reg, #(\ticks & 0xffff) - movt \reg, #(\ticks >> 16) - mcr p15, 0, \reg, c14, c2, 0 - isb - @ Enable physical timer, mask interrupt - mov \reg, #3 - mcr p15, 0, \reg, c14, c2, 1 - @ Poll physical timer until ISTATUS is on -1: isb - mrc p15, 0, \reg, c14, c2, 1 - ands \reg, \reg, #4 - bne 1b - @ Disable timer - mov \reg, #0 - mcr p15, 0, \reg, c14, c2, 1 - isb -.endm - .globl psci_fiq_enter psci_fiq_enter: push {r0-r12} diff --git a/arch/arm/include/asm/arch-armv7/generictimer.h b/arch/arm/include/asm/arch-armv7/generictimer.h new file mode 100644 index 0000000..0956d7c --- /dev/null +++ b/arch/arm/include/asm/arch-armv7/generictimer.h @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2013 - ARM Ltd + * Author: Marc Zyngier marc.zyngier@arm.com + * + * Based on code by Carl van Schaik carl@ok-labs.com. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see http://www.gnu.org/licenses/. + */ + +#ifndef _GENERICTIMER_H_ +#define _GENERICTIMER_H_ + +#ifdef __ASSEMBLY__ + +/* + * This macro provide a physical timer that can be used for delay in the code. + * The macro is moved from sunxi/psci_sun7i.S + * + * reg: is used in this macro. + * ticks: The freq is based on generic timer. + */ +.macro timer_wait reg, ticks + movw \reg, #(\ticks & 0xffff) + movt \reg, #(\ticks >> 16) + mcr p15, 0, \reg, c14, c2, 0 + isb + mov \reg, #3 + mcr p15, 0, \reg, c14, c2, 1 +1 : isb + mrc p15, 0, \reg, c14, c2, 1 + ands \reg, \reg, #4 + bne 1b + mov \reg, #0 + mcr p15, 0, \reg, c14, c2, 1 + isb +.endm + +#endif /* __ASSEMBLY__ */ + +#endif /* _GENERICTIMER_H_ */