On Tue, Aug 31, 2021 at 05:40:22PM +0200, Michael Walle wrote:
This node is some hodgepodge between the ddr controller node at SoC offset 0x1080000 and some static memory size of 2GiB. Remove this bogus node because it doesn't seem to be used at all.
Signed-off-by: Michael Walle michael@walle.cc
arch/arm/dts/fsl-ls1028a.dtsi | 6 ------ 1 file changed, 6 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index b3b497218f..8559562803 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -21,12 +21,6 @@ clock-output-names = "sysclk"; };
- memory@01080000 {
device_type = "memory";reg = <0x00000000 0x01080000 0 0x80000000>;/* DRAM space - 1, size : 2 GB DRAM */- };
- gic: interrupt-controller@6000000 { compatible = "arm,gic-v3"; reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
-- 2.30.2
Yeah it was supposed to be the DDR controller I guess. It should have had the "fsl,qoriq-memory-controller" compatible string, and a reg size of 0x1000 bytes, not.. 2GB.
Reviewed-by: Vladimir Oltean vladimir.oltean@nxp.com Tested-by: Vladimir Oltean vladimir.oltean@nxp.com