On Mar 31, 2017 7:13 PM, "Marek Vasut" marex@denx.de wrote:
On 03/30/2017 03:22 AM, chee skywind wrote:
On Wed, Mar 29, 2017 at 5:03 PM, Marek Vasut marex@denx.de wrote:
On 03/29/2017 05:49 AM, tien.fong.chee@intel.com wrote:
From: "Chee, Tien Fong" tien.fong.chee@intel.com
Commit ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole header file") miss out cleaning macro in this header file, and this has broken implementation of a boot header capability in socfpga SPL. Remove the macro in this file, and recovering it back to proper functioning.
Fixes: ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole header file")
Signed-off-by: Chee, Tien Fong tien.fong.chee@intel.com
Patch looks good, minor nit below.
arch/arm/mach-socfpga/include/mach/boot0.h | 24
++++++++++--------------
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h
b/arch/arm/mach-socfpga/include/mach/boot0.h
index aaada31..22d9e7f 100644 --- a/arch/arm/mach-socfpga/include/mach/boot0.h +++ b/arch/arm/mach-socfpga/include/mach/boot0.h @@ -8,21 +8,17 @@ #define __BOOT0_H
#ifdef CONFIG_SPL_BUILD -#define ARM_SOC_BOOT0_HOOK \
.balignl 64,0xf33db33f; \\.word 0x1337c0d3; /* SoCFPGA preloader validation word */ \.word 0xc01df00d; /* Version, flags, length */ \.word 0xcafec0d3; /* Checksum, zero-pad */ \nop; \\b reset; /* SoCFPGA jumps here */ \nop; \nop; \
.balignl 64,0xf33db33f;.word 0x1337c0d3; /* SoCFPGA preloader validation word */.word 0xc01df00d; /* Version, flags, length */.word 0xcafec0d3; /* Checksum, zero-pad */ nop;-#else -#define ARM_SOC_BOOT0_HOOK -#endif
b reset; /* SoCFPGA jumps here */nop;nop;nop;Correct me if I'm wrong, but did you add one more "nop" here ?
no, i din't add extra "nop" here. There are 3 "nop" from original code
after "b reset".
Ah sorry, I see, it's just the patch being generated in a funny way. Thanks for double-checking.
Yeah, it is weird but the patch looks correct.
Thanks.
-- Best regards, Marek Vasut