1) OOB area should be updated irrespective of NAND page size. Earlier it was updated only for 512byte NAND page.
2) During OOB update fbcr should be equal to OOB size.
Signed-off-by: Poonam Aggrwal poonam.aggrwal@freescale.com Signed-off-by: Prabhakar Kushwaha prabhakar@freescale.com --- Based upon git://git.denx.de/u-boot.git (branch master)
Top commit: commit bfcc40bb09b05c90cc3b1496abb270eb8aa72134 Merge: cba9a89 1895420 Author: Wolfgang Denk wd@denx.de Date: Fri Dec 23 20:53:58 2011 +0100
Merge branch 'next' of ../next
* 'next' of ../next: mkenvimage: Add version info switch (-V) mkenvimage: Fix getopt() error handling mkenvimage: Fix some typos phy: add Micrel KS8721BL phy definition net: introduce per device index mvgbe: remove setting of ethaddr within the driver x86: Add support for specifying an initrd with the zboot command x86: Refactor the zboot innards so they can be reused with a vboot image x86: Add infrastructure to extract an e820 table from the coreboot tables x86: Add support for booting Linux using the 32 bit boot protocol x86: Clean up the x86 zimage code in preparation to extend it x86: Import code from coreboot's libpayload to parse the coreboot table x86: Initial commit for running as a coreboot payload CHECKPATCH: ./board/esd/hh405/logo_320_240_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_1024_768_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/hh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/apc405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/voh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/voh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/hh405/fpgadata.c CHECKPATCH: ./board/esd/pci405/fpgadata.c CHECKPATCH: ./board/esd/tasreg/fpgadata.c
drivers/mtd/nand/fsl_ifc_nand.c | 17 +++++++++-------- 1 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index 3a28ab8..56ae66a 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -450,13 +450,7 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, out_be32(&ifc->ifc_nand.nand_fir1, (IFC_FIR_OP_CW1 << IFC_NAND_FIR1_OP5_SHIFT));
- if (column >= mtd->writesize) { - /* OOB area --> READOOB */ - column -= mtd->writesize; - nand_fcr0 |= NAND_CMD_READOOB << - IFC_NAND_FCR0_CMD0_SHIFT; - ctrl->oob = 1; - } else if (column < 256) { + if (column < 256) { /* First 256 bytes --> READ0 */ nand_fcr0 |= NAND_CMD_READ0 << FCR_CMD0_SHIFT; } else { @@ -465,6 +459,12 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, } }
+ if (column >= mtd->writesize) { + /* OOB area --> READOOB */ + column -= mtd->writesize; + ctrl->oob = 1; + } + out_be32(&ifc->ifc_nand.nand_fcr0, nand_fcr0); set_addr(mtd, column, page_addr, ctrl->oob); return; @@ -473,7 +473,8 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, /* PAGEPROG reuses all of the setup from SEQIN and adds the length */ case NAND_CMD_PAGEPROG: if (ctrl->oob) - out_be32(&ifc->ifc_nand.nand_fbcr, ctrl->index); + out_be32(&ifc->ifc_nand.nand_fbcr, + ctrl->index - ctrl->column); else out_be32(&ifc->ifc_nand.nand_fbcr, 0);