[U-Boot-Users] [PATCH 2/2][SH] Hitachi MS7750SE Support

-- Nobuhiro Iwamatsu E-Mail : iwamatsu@nigauri.org GPG ID : 3170EBE9 Signed-off-by: Nobuhiro Iwamatsu iwamatsu@nigauri.org diff --git a/board/ms7750se/ms7750se.c b/board/ms7750se/ms7750se.c new file mode 100644 index 0000000..4b4697b --- /dev/null +++ b/board/ms7750se/ms7750se.c @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2007 + * Nobuhiro Iwamatsu iwamatsu@nigauri.org + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> + +int checkboard(void) +{ + puts("BOARD: SH7750 Solution Engine\n"); + return 0; +} + +int board_init(void) +{ + return 0; +} + +int dram_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_memstart = CFG_SDRAM_BASE; + gd->bd->bi_memsize = CFG_SDRAM_SIZE; + printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024)); + return 0; +} + +int board_late_init(void) +{ + return 0; +} diff --git a/board/ms7750se/u-boot.lds b/board/ms7750se/u-boot.lds new file mode 100644 index 0000000..5b35cfa --- /dev/null +++ b/board/ms7750se/u-boot.lds @@ -0,0 +1,106 @@ +/* + * Copyrigth (c) 2007 + * Nobuhiro Iwamatsu iwamatsu@nigauri.org + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +OUTPUT_ARCH(sh) +ENTRY(_start) + +SECTIONS +{ + /* + Base address of internal SDRAM is 0x0C000000. + Although size of SDRAM can be either 16 or 32 MBytes, + we assume 16 MBytes (ie ignore upper half if the full + 32 MBytes is present). + + NOTE: This address must match with the definition of + TEXT_BASE in config.mk (in this directory). + + */ + . = 0x8C000000 + (64*1024*1024) - (256*1024); + + PROVIDE (reloc_dst = .); + + PROVIDE (_ftext = .); + PROVIDE (_fcode = .); + PROVIDE (_start = .); + + .text : + { + cpu/sh4/start.o (.text) + . = ALIGN(8192); + common/environment.o (.ppcenv) + . = ALIGN(8192); + common/environment.o (.ppcenvr) + . = ALIGN(8192); + *(.text) + . = ALIGN(4); + } =0xFF + PROVIDE (_ecode = .); + .rodata : + { + *(.rodata) + . = ALIGN(4); + } + PROVIDE (_etext = .); + + + PROVIDE (_fdata = .); + .data : + { + *(.data) + . = ALIGN(4); + } + PROVIDE (_edata = .); + + PROVIDE (_fgot = .); + .got : + { + *(.got) + . = ALIGN(4); + } + PROVIDE (_egot = .); + + PROVIDE (__u_boot_cmd_start = .); + .u_boot_cmd : + { + *(.u_boot_cmd) + . = ALIGN(4); + } + PROVIDE (__u_boot_cmd_end = .); + + PROVIDE (reloc_dst_end = .); + /* _reloc_dst_end = .; */ + + PROVIDE (bss_start = .); + PROVIDE (__bss_start = .); + .bss : + { + *(.bss) + . = ALIGN(4); + } + PROVIDE (bss_end = .); + + PROVIDE (_end = .); +} + diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h new file mode 100644 index 0000000..0467a5e --- /dev/null +++ b/include/configs/ms7750se.h @@ -0,0 +1,75 @@ +#ifndef __CONFIG_H +#define __CONFIG_H + +#undef DEBUG + +#define CONFIG_SH 1 +#define CONFIG_SH4 1 +#define CONFIG_CPU_SH7750 1 +#define CONFIG_MS7750SE 1 +#define __LITTLE_ENDIAN__ 1 + +//#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_NET |CFG_CMD_PING) +#define CONFIG_COMMANDS CONFIG_CMD_DFL & ~CFG_CMD_NET + +#define CFG_SCIF_CONSOLE 1 +#define CONFIG_BAUDRATE 38400 +#define CONFIG_CONS_SCIF1 1 +#define BOARD_LATE_INIT 1 + +#include <cmd_confdefs.h> + +#define CONFIG_BOOTDELAY -1 +#define CONFIG_BOOTARGS "console=ttySC0,115200" +#define CONFIG_ENV_OVERWRITE 1 + +#define CFG_SDRAM_BASE (0x8C000000) +#define CFG_SDRAM_SIZE (64 * 1024 * 1024) + +#define CFG_LONGHELP +#define CFG_PROMPT "=> " +#define CFG_CBSIZE 256 +#define CFG_PBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_BARGSIZE 512 +#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } /* List of legal baudrate settings for this board */ + +#define CFG_MEMTEST_START (CFG_SDRAM_BASE) +#define CFG_MEMTEST_END (TEXT_BASE - 0x100000) + + +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024) +#define CFG_MONITOR_BASE (CFG_FLASH_BASE) /* Address of u-boot image in Flash */ +#define CFG_MONITOR_LEN (128 * 1024) +#define CFG_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ + +#define CFG_GBL_DATA_SIZE (256) /* size in bytes reserved for initial data */ +#define CFG_BOOTMAPSZ (8 * 1024 * 1024) +#define CFG_RX_ETH_BUFFER (8) + +#define CFG_FLASH_CFI +#define CFG_FLASH_CFI_DRIVER +#undef CFG_FLASH_CFI_BROKEN_TABLE +#undef CFG_FLASH_QUIET_TEST +#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ + +#define CFG_FLASH_BASE (0xA1000000) +#define CFG_MAX_FLASH_BANKS (1) /* Max number of + * Flash memory banks + */ +#define CFG_MAX_FLASH_SECT 142 +#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } + +#define CFG_ENV_IS_IN_FLASH +#define CFG_ENV_SECT_SIZE 0x20000 +#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE) +#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) +#define CFG_FLASH_ERASE_TOUT 120000 +#define CFG_FLASH_WRITE_TOUT 500 + +#define CONFIG_SYS_CLK_FREQ 33333333 +#define TMU_CLK_DIVIDER 4 +#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) +#define CFG_PLL_SETTLING_TIME 100 /* in us */ + +#endif /* __CONFIG_H */