On 27/10/2024 16:15, Marek Vasut wrote:
On 10/24/24 5:24 PM, Paul Barker wrote:
On the RZ/G2L SoC family, the direction of the Ethernet TXC/TX_CLK signal is selectable to support an Ethernet PHY operating in either MII or RGMII mode. By default, the signal is configured as an input and MII mode is supported. The ETH_MODE register can be modified to configure this signal as an output to support RGMII mode.
As this signal is be default an input, and can optionally be switched to an output, it maps neatly onto an `output-enable` property in the device tree.
Signed-off-by: Paul Barker paul.barker.ct@bp.renesas.com
Same comment as on 2/14 regarding kernel commits.
This was re-implemented in U-Boot due to differences between the existing RZ/G2L pinctrl code in Linux and U-Boot.
Is this something which should be configured in DT instead ?
This patch adds support for configuring it in the DT, using the 'output-enable' property. You can see this used later in this series in the device tree patch to enable Ethernet TXC output [1].
[1]: https://msgid.link/20241024152448.102-14-paul.barker.ct@bp.renesas.com
Thanks,