
23 May
2021
23 May
'21
1:17 a.m.
align CLK_USB_PHY0 with tabs
Signed-off-by: Andreas Rehn rehn.andreas86@gmail.com --- Changes in v2: - revert CLK_SPI0 extra tab
drivers/clk/sunxi/clk_v3s.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c index 55fc597043..bc6b7b4870 100644 --- a/drivers/clk/sunxi/clk_v3s.c +++ b/drivers/clk/sunxi/clk_v3s.c @@ -29,7 +29,7 @@ static struct ccu_clk_gate v3s_gates[] = {
[CLK_SPI0] = GATE(0x0a0, BIT(31)),
- [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), + [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), };
static struct ccu_reset v3s_resets[] = {
--
2.25.1