From: Jagan Teki jagan@amarulasolutions.com
Usually the drive strength values for DQ and SDL are 0x30 and 0x28 respectively, update them accordingly.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6/icorem6.c | 58 ++++++++++++++++----------------- board/engicam/icorem6_rqs/icorem6_rqs.c | 58 ++++++++++++++++----------------- 2 files changed, 58 insertions(+), 58 deletions(-)
diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c index 8c62f0e..8aaac40 100644 --- a/board/engicam/icorem6/icorem6.c +++ b/board/engicam/icorem6/icorem6.c @@ -369,29 +369,29 @@ int board_fit_config_name_match(const char *name)
/* configure MX6Q/DUAL mmdc DDR io registers */ static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = { - .dram_sdqs0 = 0x28, - .dram_sdqs1 = 0x28, - .dram_sdqs2 = 0x28, - .dram_sdqs3 = 0x28, - .dram_sdqs4 = 0x28, - .dram_sdqs5 = 0x28, - .dram_sdqs6 = 0x28, - .dram_sdqs7 = 0x28, - .dram_dqm0 = 0x28, - .dram_dqm1 = 0x28, - .dram_dqm2 = 0x28, - .dram_dqm3 = 0x28, - .dram_dqm4 = 0x28, - .dram_dqm5 = 0x28, - .dram_dqm6 = 0x28, - .dram_dqm7 = 0x28, + .dram_sdqs0 = 0x30, + .dram_sdqs1 = 0x30, + .dram_sdqs2 = 0x30, + .dram_sdqs3 = 0x30, + .dram_sdqs4 = 0x30, + .dram_sdqs5 = 0x30, + .dram_sdqs6 = 0x30, + .dram_sdqs7 = 0x30, + .dram_dqm0 = 0x30, + .dram_dqm1 = 0x30, + .dram_dqm2 = 0x30, + .dram_dqm3 = 0x30, + .dram_dqm4 = 0x30, + .dram_dqm5 = 0x30, + .dram_dqm6 = 0x30, + .dram_dqm7 = 0x30, .dram_cas = 0x30, .dram_ras = 0x30, .dram_sdclk_0 = 0x30, .dram_sdclk_1 = 0x30, .dram_reset = 0x30, - .dram_sdcke0 = 0x3000, - .dram_sdcke1 = 0x3000, + .dram_sdcke0 = 0x30, + .dram_sdcke1 = 0x30, .dram_sdba2 = 0x00000000, .dram_sdodt0 = 0x30, .dram_sdodt1 = 0x30, @@ -417,16 +417,16 @@ static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {
/* configure MX6SOLO/DUALLITE mmdc DDR io registers */ struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = { - .dram_sdclk_0 = 0x30, - .dram_sdclk_1 = 0x30, - .dram_cas = 0x30, - .dram_ras = 0x30, - .dram_reset = 0x30, - .dram_sdcke0 = 0x30, - .dram_sdcke1 = 0x30, + .dram_sdclk_0 = 0x28, + .dram_sdclk_1 = 0x28, + .dram_cas = 0x28, + .dram_ras = 0x28, + .dram_reset = 0x28, + .dram_sdcke0 = 0x28, + .dram_sdcke1 = 0x28, .dram_sdba2 = 0x00000000, - .dram_sdodt0 = 0x30, - .dram_sdodt1 = 0x30, + .dram_sdodt0 = 0x28, + .dram_sdodt1 = 0x28, .dram_sdqs0 = 0x28, .dram_sdqs1 = 0x28, .dram_sdqs2 = 0x28, @@ -450,8 +450,8 @@ struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = { .grp_ddr_type = 0x000c0000, .grp_ddrmode_ctl = 0x00020000, .grp_ddrpke = 0x00000000, - .grp_addds = 0x30, - .grp_ctlds = 0x30, + .grp_addds = 0x28, + .grp_ctlds = 0x28, .grp_ddrmode = 0x00020000, .grp_b0ds = 0x28, .grp_b1ds = 0x28, diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index d6ca62d..24093bb 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -240,29 +240,29 @@ int board_fit_config_name_match(const char *name)
/* configure MX6Q/DUAL mmdc DDR io registers */ static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = { - .dram_sdqs0 = 0x28, - .dram_sdqs1 = 0x28, - .dram_sdqs2 = 0x28, - .dram_sdqs3 = 0x28, - .dram_sdqs4 = 0x28, - .dram_sdqs5 = 0x28, - .dram_sdqs6 = 0x28, - .dram_sdqs7 = 0x28, - .dram_dqm0 = 0x28, - .dram_dqm1 = 0x28, - .dram_dqm2 = 0x28, - .dram_dqm3 = 0x28, - .dram_dqm4 = 0x28, - .dram_dqm5 = 0x28, - .dram_dqm6 = 0x28, - .dram_dqm7 = 0x28, + .dram_sdqs0 = 0x30, + .dram_sdqs1 = 0x30, + .dram_sdqs2 = 0x30, + .dram_sdqs3 = 0x30, + .dram_sdqs4 = 0x30, + .dram_sdqs5 = 0x30, + .dram_sdqs6 = 0x30, + .dram_sdqs7 = 0x30, + .dram_dqm0 = 0x30, + .dram_dqm1 = 0x30, + .dram_dqm2 = 0x30, + .dram_dqm3 = 0x30, + .dram_dqm4 = 0x30, + .dram_dqm5 = 0x30, + .dram_dqm6 = 0x30, + .dram_dqm7 = 0x30, .dram_cas = 0x30, .dram_ras = 0x30, .dram_sdclk_0 = 0x30, .dram_sdclk_1 = 0x30, .dram_reset = 0x30, - .dram_sdcke0 = 0x3000, - .dram_sdcke1 = 0x3000, + .dram_sdcke0 = 0x30, + .dram_sdcke1 = 0x30, .dram_sdba2 = 0x00000000, .dram_sdodt0 = 0x30, .dram_sdodt1 = 0x30, @@ -288,16 +288,16 @@ static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = {
/* configure MX6SOLO/DUALLITE mmdc DDR io registers */ struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = { - .dram_sdclk_0 = 0x30, - .dram_sdclk_1 = 0x30, - .dram_cas = 0x30, - .dram_ras = 0x30, - .dram_reset = 0x30, - .dram_sdcke0 = 0x30, - .dram_sdcke1 = 0x30, + .dram_sdclk_0 = 0x28, + .dram_sdclk_1 = 0x28, + .dram_cas = 0x28, + .dram_ras = 0x28, + .dram_reset = 0x28, + .dram_sdcke0 = 0x28, + .dram_sdcke1 = 0x28, .dram_sdba2 = 0x00000000, - .dram_sdodt0 = 0x30, - .dram_sdodt1 = 0x30, + .dram_sdodt0 = 0x28, + .dram_sdodt1 = 0x28, .dram_sdqs0 = 0x28, .dram_sdqs1 = 0x28, .dram_sdqs2 = 0x28, @@ -321,8 +321,8 @@ struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = { .grp_ddr_type = 0x000c0000, .grp_ddrmode_ctl = 0x00020000, .grp_ddrpke = 0x00000000, - .grp_addds = 0x30, - .grp_ctlds = 0x30, + .grp_addds = 0x28, + .grp_ctlds = 0x28, .grp_ddrmode = 0x00020000, .grp_b0ds = 0x28, .grp_b1ds = 0x28,