On i.MX6SX, 6UL and 7D, there are two enet controllers each has a MDIO port. But Some boards share one MDIO port for the two enets. So introduce a configuration CONFIG_FEC_MXC_MDIO_BASE to indicate the MDIO port for sharing.
Signed-off-by: Peng Fan peng.fan@nxp.com --- drivers/net/Kconfig | 7 +++++++ drivers/net/fec_mxc.c | 9 +++++++++ 2 files changed, 16 insertions(+)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index de1947ccc1..3a468a7c59 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -147,6 +147,13 @@ config ETHOC help This MAC is present in OpenRISC and Xtensa XTFPGA boards.
+config FEC_MXC_MDIO_BASE + hex "MDIO base address for the FEC controller" + depends on FEC_MXC + help + This specifies the MDIO registers base address. It is used when + two FEC controllers share MDIO bus. + config FEC_MXC bool "FEC Ethernet controller" depends on MX5 || MX6 diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 2c3171ecc9..e8f8fef66a 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1161,8 +1161,12 @@ int fecmxc_initialize_multi(bd_t *bd, int dev_id, int phy_id, uint32_t addr) * Only the first one can access the MDIO bus. */ base_mii = MXS_ENET0_BASE; +#else +#ifdef CONFIG_FEC_MXC_MDIO_BASE + base_mii = CONFIG_FEC_MXC_MDIO_BASE; #else base_mii = addr; +#endif #endif debug("eth_init: fec_probe(bd, %i, %i) @ %08x\n", dev_id, phy_id, addr); bus = fec_get_miibus(base_mii, dev_id); @@ -1274,7 +1278,12 @@ static int fecmxc_probe(struct udevice *dev) fec_reg_setup(priv);
priv->dev_id = dev->seq; + +#ifdef CONFIG_FEC_MXC_MDIO_BASE + bus = fec_get_miibus((ulong)CONFIG_FEC_MXC_MDIO_BASE, dev->seq); +#else bus = fec_get_miibus((ulong)priv->eth, dev->seq); +#endif if (!bus) { ret = -ENOMEM; goto err_mii;