On 07/05/2012 07:28 PM, Scott Wood wrote:
On 07/04/2012 02:46 AM, Jim Lin wrote:
-----Original Message----- From: Scott Wood [mailto:scottwood@freescale.com] Sent: Thursday, April 26, 2012 6:17 AM To: Simon Glass Cc: U-Boot Mailing List; Tom Warren; Stephen Warren; Jim Lin; Stephen Warren Subject: Re: [PATCH v3 6/7] tegra: nand: Add Tegra NAND driver
On 04/17/2012 01:50 PM, Simon Glass wrote:
+static void write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) +{
- int i, j, l;
- struct nand_chip *chip = mtd->priv;
- struct nand_drv *info;
- info = (struct nand_drv *)chip->priv;
- for (i = 0; i < len / 4; i++) {
l = ((int *)buf)[i];If you're assuming the buffer is 32-bit aligned, comment it. Ideally these assumptions should be stated in the interface itself...
This doesn't mean that buf needs to be 32-bit aligned. It only says each write is 32-bit.
OK, didn't realize modern ARM could deal with unaligned accesses.
I'd like to see some more research here; I know that recent printk changes in the ARM kernel caused unaligned accesses which in turn caused significant problems (including on Tegra). This might only have been for 64-bit accesses, so perhaps 32-bit accesses don't have an issue, but if you could confirm this Jim, that'd be great.