-----Original Message----- From: Maniyam, Dinesh dinesh.maniyam@intel.com Sent: Wednesday, 1 June, 2022 6:49 PM To: u-boot@lists.denx.de Cc: Vasut, Marek marex@denx.de; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Lim, Elly Siew Chin elly.siew.chin.lim@intel.com; Chee, Tien Fong tien.fong.chee@intel.com; Hea, Kok Kiang kok.kiang.hea@intel.com; Gan, Yau Wai yau.wai.gan@intel.com; Kho, Sin Hui sin.hui.kho@intel.com; Lokanathan, Raaj raaj.lokanathan@intel.com; Maniyam, Dinesh dinesh.maniyam@intel.com Subject: [PATCH v3] ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched
From: Dinesh Maniyam dinesh.maniyam@intel.com
Convert the constant integer to 'phys_size_t' to avoid overflow when calculating the SDRAM size.
Signed-off-by: Dinesh Maniyam dinesh.maniyam@intel.com
v3->v2
- copyright year updated and alignment updated.
v2->v1
- add space in title
drivers/ddr/altera/sdram_soc64.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c index d6baac2410..9b1710c135 100644 --- a/drivers/ddr/altera/sdram_soc64.c +++ b/drivers/ddr/altera/sdram_soc64.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /*
- Copyright (C) 2016-2021 Intel Corporation <www.intel.com>
*/
- Copyright (C) 2016-2022 Intel Corporation <www.intel.com>
@@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat) { u32 dramaddrw = hmc_readl(plat, DRAMADDRW);
- phys_size_t size = 1 <<
(DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
- phys_size_t size = (phys_size_t)1 <<
(DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw)DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +
2.25.1
Reviewed-by: Tien Fong Chee tien.fong.chee@intel.com
Regards Tien Fong