This series implements peripheral reset handling for socfpga gen5.
It moves from enabling all peripherals during SPL startup to using the socfpga reset driver from all peripherals and enabling peripherals when they are used.
As Linux cannot even handle this in 4.20, the reset driver implements a compatibility mode where it takes all peripherals out of reset before jumpint to the OS if an environment variable "socfpga_permodrst_ungate=1" is found. This is enabled by default for socfpga gen5 boards, but should be moved to default off in the near future once a Linux kernel supports reset handling for all drivers.
Changes in v2: - cleanly merged Linux dts (moved change of SDR controller base address to a separate patch) - port DDR driver to DM UCLASS_RAM - don't change DDR calibration training driver (code got too big) - use reset.h code instead of socfpga_per_reset() - fix copy/paste issues - add .remove callback to release the resets - add .remove callback to release the resets - moved from Kernel option "OLD_SOCFPGA_KERNEL_COMPAT" to environment variable "socfpga_permodrst_ungate" - this patch is new in v2 - removed Kconfig option OLD_SOCFPGA_KERNEL_COMPAT since compatibility now uses an environment variable
Simon Goldschmidt (8): arm: socfpga: gen5: sync devicetrees to Linux arm: socfpga: gen5: add reset & sdr node to SPL devicetrees arm: socfpga: move gen5 SDR driver to DM mtd: rawnand: denali: add reset handling spi: cadence_qspi: add reset handling reset: socfpga: add reset handling for old kernels arm: socfpga: gen5: deassert peripheral reset by default arm: socfpga: implement proper peripheral reset
arch/arm/Kconfig | 2 + arch/arm/dts/socfpga.dtsi | 23 ++- arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi | 8 + arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts | 8 + .../socfpga_cyclone5_de0_nano_soc-u-boot.dtsi | 8 + arch/arm/dts/socfpga_cyclone5_de10_nano.dts | 8 + arch/arm/dts/socfpga_cyclone5_de1_soc.dts | 8 + arch/arm/dts/socfpga_cyclone5_is1.dts | 8 + .../dts/socfpga_cyclone5_socdk-u-boot.dtsi | 8 + .../dts/socfpga_cyclone5_sockit-u-boot.dtsi | 8 + .../dts/socfpga_cyclone5_socrates-u-boot.dtsi | 8 + arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 - arch/arm/dts/socfpga_cyclone5_sr1500.dts | 8 + .../socfpga_cyclone5_vining_fpga-u-boot.dtsi | 8 + .../mach-socfpga/include/mach/sdram_gen5.h | 4 - arch/arm/mach-socfpga/misc_gen5.c | 10 -- arch/arm/mach-socfpga/spl_gen5.c | 39 ++--- drivers/ddr/altera/Kconfig | 1 + drivers/ddr/altera/sdram_gen5.c | 143 ++++++++++++++++-- drivers/ddr/altera/sequencer.c | 9 +- drivers/ddr/altera/sequencer.h | 35 +++++ drivers/mtd/nand/raw/denali.h | 2 + drivers/mtd/nand/raw/denali_dt.c | 14 ++ drivers/reset/reset-socfpga.c | 34 +++++ drivers/spi/cadence_qspi.c | 16 ++ drivers/spi/cadence_qspi.h | 4 + include/configs/socfpga_common.h | 14 ++ 27 files changed, 374 insertions(+), 66 deletions(-)