Benedict, Michael wrote:
Hello, This is my first patch submission to u-boot, so let me know if the format needs to be updated.
There should be a "---" underneath the signed-off-by lines, and comments about the patch should be located *below* the "---". Patches for 83xx should be posted to u-boot-users and emailed to Kim Phillips directly.
Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349ITX. This allows ddr->sdram_clk_cntl to be properly initialized, like it was before commit f6eda7f80ccc13d658020268c507d7173cf2e8aa to cpu/mpc83xx/spd_sdram.c
You should probably update fixed_sdram() in mpc8349itx.c as well. Currently, it has this code:
im->ddr.sdram_clk_cntl = DDR_SDRAM_CLK_CNTL_SS_EN | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05;
That should be changed to
im->ddr.sdram_clk_cntl = CFG_DDR_SDRAM_CLK_CNTL;
I'll test this code on my ITX, however, I'm curious about one thing. Can you explain why this patch is okay for *all* ITX boards? I remember something about your board having problematic DDR or something. With your patch, all ITX and ITX-GP boards will set sdram_clk_cntl to the new value when SPD is used.