-----Original Message----- From: Marek Behún marek.behun@nic.cz Sent: Wednesday, August 19, 2020 12:57 To: u-boot@lists.denx.de Cc: Kostya Porotchkin kostap@marvell.com; Marek Behún marek.behun@nic.cz; Pali Rohár pali@kernel.org; Stefan Roese sr@denx.de Subject: [EXT] [PATCH u-boot-marvell] arm64: dts: armada-3720-espressobin: fix COMPHY nodes
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This commit fixes initialization of COMPHY on EspressoBin.
Commit 22f418935be4 ("phy: marvell: a3700: Use comphy_mux on Armada 37xx.") introduced usage of comphy_mux on Armada 37xx comphy driver. The lanes are defined in comphy_a3700.c as described in functional specification, that is: lane 0 is SGMII1 or USB3 lane 1 is PCIe or SGMII0 lane 2 is SATA or USB3
But the DTS for EspressoBin configures PCIe on lane 0 and USB3 on lane 1, which is wrong in the sense of the specification and doesn't work with the comphy_mux code, which is 2 years now (the aardvark driver causes synchronous abort in U-Boot).
It worked till the above mentioned commit, because the code for powering up PCIe PHY doesn't work with lane number at all, and the code for powering up USB3 PHY works differently only if USB3 is on lane 2, ie. the check goes like: if (lane == 2) something else something else so it does not differentiate between lanes 0 and 1.
In the future I shall post patches that remove the comphy_a3700 driver and add comphy driver which uses calls to ATF, like Linux' driver does. This will have the advantage of same DTS bindings as Linux', but till this is done, we need this patch.
Signed-off-by: Marek Behún marek.behun@nic.cz Tested-by: Pali Rohár pali@kernel.org Cc: Stefan Roese sr@denx.de
arch/arm/dts/armada-3720-espressobin.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/armada-3720-espressobin.dts b/arch/arm/dts/armada-3720-espressobin.dts index 84e2c2adba..50381e979e 100644 --- a/arch/arm/dts/armada-3720-espressobin.dts +++ b/arch/arm/dts/armada-3720-espressobin.dts @@ -72,13 +72,13 @@ &comphy { max-lanes = <3>; phy0 {
phy-type = <PHY_TYPE_PEX0>;phy-speed = <PHY_SPEED_2_5G>;
phy-type = <PHY_TYPE_USB3_HOST0>;phy-speed = <PHY_SPEED_5G>;};
phy1 {
phy-type = <PHY_TYPE_USB3_HOST0>;phy-speed = <PHY_SPEED_5G>;
phy-type = <PHY_TYPE_PEX0>;phy-speed = <PHY_SPEED_2_5G>;};
phy2 {
-- 2.26.2
Reviewed by Konstantin Porotchkin kostap@marvell.com