Re: [DNX#2006040142000428] [U-Boot-Users] [PATCH] Correct register for pci as [...]

Hello list,

inside the automatic U-Boot patch tracking system a new ticket [DNX#2006040142000428] was created:

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Hi, Stefan

This patch fixes the register for PCI async mode configuration information.

Best regards, Youngchul Bang

diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index a463053..a26533c 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -57,7 +57,7 @@ int pci_async_enabled(void) #if defined(CONFIG_440EP) || defined(CONFIG_440GR) unsigned long val;

•   mfsdr(cpc0_strp1, val);
  

•   mfsdr(sdr_sdstp1, val);
    return (val & SDR0_SDSTP1_PAME_MASK);
  

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