Hello Andreas,
On 04/03/2013 04:50 PM, Andreas Bießmann wrote:
The kernel states:
---8<--- The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not provide automatic error location and correction: this step is implemented using the BCH library. --->8---
And we do so in u-boot.
This implementation uses the same layout for BCH8 but it is fix. The current provided layout does only work with 64 Byte OOB.
Signed-off-by: Andreas Bießmann andreas.devel@googlemail.com Cc: Tom Rini trini@ti.com Cc: Ilya Yanok ilya.yanok@cogentembedded.com Cc: Scott Wood scottwood@freescale.com Cc: Mansoor Ahamed mansoor.ahamed@ti.com
since v1:
- cleanups (remove debug stuff)
- make checkpach clean (still 2 warnings which I will not fix)
- merge some code with the AM33XX implementation
since v2:
- fix all checkpatch warnings
- add more comments
- add NAND section in README.omap3
doc/README.omap3 | 19 +++ drivers/mtd/nand/omap_gpmc.c | 367 +++++++++++++++++++++++++++++++----------- lib/Makefile | 2 +- 3 files changed, 296 insertions(+), 92 deletions(-)
diff --git a/doc/README.omap3 b/doc/README.omap3 index 0a37de0..56aca8e 100644 --- a/doc/README.omap3 +++ b/doc/README.omap3 @@ -145,6 +145,25 @@ int omap3_dma_wait_for_transfer(uint32_t chan) int omap3_dma_get_revision(uint32_t *minor, uint32_t *major) Read silicon Revision of the DMA module
+NAND +====
+Ther eare some OMAP3 devices out ther with NAND attached. Due to the fact that
ther -> there
+OMAP3 ROM code can only handle 1-bit hamming ECC for accessing first page +(place where SPL lives) we require this setup for u-boot at least when reading +the second progam within SPL. A lot of newer NAND chips however require more +than 1-bit ECC for the pages, some can live with 1-bit for the first page. To +handle this we can switch to another ECC algorithm after reading the payload +within SPL.
+BCH8 +----
+To enable hardware assisted BCH8 (8-bit BCH [Bose, Chaudhuri, Hocquenghem]) on +OMAP3 devices we can use the BCH library in lib/bch.c. To do so add CONFIG_BCH +to enable the library and CONFIG_NAND_OMAP_BCH8 to your board config. +The NAND OOB layout is the same as in linux kernel, if the linux kernel BCH8 +implementation for OMAP3 works for you so the u-boot version should also.
Acknowledgements
Thomas