
From: Sin Hui Kho sin.hui.kho@intel.com
Add clock manager driver support for AGILEX7 by reuse Agilex clock manager.
Signed-off-by: Sin Hui Kho sin.hui.kho@intel.com --- arch/arm/mach-socfpga/Makefile | 1 + arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 +- arch/arm/mach-socfpga/misc.c | 3 +++ drivers/clk/altera/Makefile | 1 + 4 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 224ed02865..39b1168821 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -72,6 +72,7 @@ obj-y += wrap_pll_config_soc64.o endif
ifdef CONFIG_TARGET_SOCFPGA_AGILEX7 +obj-y += clock_manager_agilex.o obj-y += lowlevel_init_soc64.o obj-y += mailbox_s10.o obj-y += misc_soc64.o diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h index a8cb07a1c4..252db8204e 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h @@ -26,7 +26,7 @@ int cm_set_qspi_controller_clk_hz(u32 clk_hz); #include <asm/arch/clock_manager_arria10.h> #elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10) #include <asm/arch/clock_manager_s10.h> -#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX) +#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX) || defined(CONFIG_TARGET_SOCFPGA_AGILEX7) #include <asm/arch/clock_manager_agilex.h> #elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X) #include <asm/arch/clock_manager_n5x.h> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 5b5a81a255..fe3cb1ec01 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -257,6 +257,9 @@ void socfpga_get_managers_addr(void) #elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X) ret = socfpga_get_base_addr("intel,n5x-clkmgr", &socfpga_clkmgr_base); +#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7) + ret = socfpga_get_base_addr("intel,agilex-clkmgr", + &socfpga_clkmgr_base); #else ret = socfpga_get_base_addr("altr,clk-mgr", &socfpga_clkmgr_base); #endif diff --git a/drivers/clk/altera/Makefile b/drivers/clk/altera/Makefile index 33db092918..247a44b093 100644 --- a/drivers/clk/altera/Makefile +++ b/drivers/clk/altera/Makefile @@ -4,6 +4,7 @@ #
obj-$(CONFIG_TARGET_SOCFPGA_AGILEX) += clk-agilex.o +obj-$(CONFIG_TARGET_SOCFPGA_AGILEX7) += clk-agilex.o obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += clk-arria10.o obj-$(CONFIG_TARGET_SOCFPGA_N5X) += clk-n5x.o obj-$(CONFIG_TARGET_SOCFPGA_N5X) += clk-mem-n5x.o