[U-Boot] [PATCH v3 1/4] spi:rewrite the Freescale DSPI driver.

20 Dec 2013

From: Chao Fu B44548@freescale.com
Freescale DSPI module is used on both the ColdFire platform and the ARM
platform. The original DSPI driver is written for ColdFire platform only,
this patch rewrite the driver to make it be used across the platforms.
Some files, functions, variables and macros were changed accordingly for
some ColdFire boards and Arm boards.
The rewrite including the following changes:
Rename the file name :
        cf_spi.c -> fsl_dspi.c
Move the file:
        arch/m68k/include/asm/coldfire/dspi.h -> include/fsl_dspi.h
Rename the functions and variables:
        cfxxx -> dspixxx
Renamed macros:
        CONFIG_CF_DSPI -> CONFIG_FSL_DSPI
Keep the following functions for ColdFire:
        cfspi_port_conf()
    cfspi_claim_bus()
    cfspi_release_bus()
Add function for ColdFire:
        get_dspi_clk()
Tested on board M54455EVB and VF610-twr.
Signed-off-by: Chao Fu B44548@freescale.com
---
Change in v2:
    Merge m68k update and driver update into the patch.
Change in v3:
    Remove some unstandard coding style.
arch/m68k/cpu/mcf5227x/cpu_init.c                  |   3 +-
 arch/m68k/cpu/mcf5227x/speed.c                     |   7 +
 arch/m68k/cpu/mcf52x2/speed.c                      |   7 +
 arch/m68k/cpu/mcf5445x/cpu_init.c                  |   3 +-
 arch/m68k/cpu/mcf5445x/speed.c                     |   7 +
 arch/m68k/include/asm/immap_5227x.h                |   1 -
 arch/m68k/include/asm/immap_5301x.h                |   1 -
 arch/m68k/include/asm/immap_5441x.h                |   1 -
 arch/m68k/include/asm/immap_5445x.h                |   1 -
 arch/m68k/include/asm/immap_547x_8x.h              |   1 -
 drivers/spi/Makefile                               |   2 +-
 drivers/spi/{cf_spi.c => fsl_dspi.c}               | 240 +++++++++++----------
 include/configs/M52277EVB.h                        |   3 +-
 include/configs/M54418TWR.h                        |   3 +-
 include/configs/M54451EVB.h                        |   3 +-
 include/configs/M54455EVB.h                        |   3 +-
 .../asm/coldfire/dspi.h => include/fsl_dspi.h      |   8 +-
 17 files changed, 156 insertions(+), 138 deletions(-)
 rename drivers/spi/{cf_spi.c => fsl_dspi.c} (56%)
 rename arch/m68k/include/asm/coldfire/dspi.h => include/fsl_dspi.h (96%)

diff --git a/arch/m68k/cpu/mcf5227x/cpu_init.c b/arch/m68k/cpu/mcf5227x/cpu_init.c
index 91b5fad..bd0b4ab 100644
--- a/arch/m68k/cpu/mcf5227x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5227x/cpu_init.c
@@ -16,6 +16,7 @@
 #include <asm/io.h>
 #include <asm/rtc.h>
 #include <linux/compiler.h>
+#include <fsl_dspi.h>
/*
  * Breath some life into the CPU...
@@ -139,7 +140,7 @@ void uart_port_conf(int port)
    }
 }
-#ifdef CONFIG_CF_DSPI
+#ifdef CONFIG_FSL_DSPI
 void cfspi_port_conf(void)
 {
    gpio_t *gpio = (gpio_t *) MMAP_GPIO;
diff --git a/arch/m68k/cpu/mcf5227x/speed.c b/arch/m68k/cpu/mcf5227x/speed.c
index 44de4a6..2bfff13 100644
--- a/arch/m68k/cpu/mcf5227x/speed.c
+++ b/arch/m68k/cpu/mcf5227x/speed.c
@@ -124,3 +124,10 @@ int get_clocks(void)
return (0);
 }
+
+#ifdef CONFIG_FSL_DSPI
+int get_dspi_clk(void)
+{
+	return gd->bus_clk;
+}
+#endif
diff --git a/arch/m68k/cpu/mcf52x2/speed.c b/arch/m68k/cpu/mcf52x2/speed.c
index c5961d4..69b49c7 100644
--- a/arch/m68k/cpu/mcf52x2/speed.c
+++ b/arch/m68k/cpu/mcf52x2/speed.c
@@ -83,3 +83,10 @@ int get_clocks (void)
return (0);
 }
+
+#ifdef CONFIG_FSL_DSPI
+int get_dspi_clk(void)
+{
+	return gd->bus_clk;
+}
+#endif
diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c
index 9c324dc..bb7a4cd 100644
--- a/arch/m68k/cpu/mcf5445x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5445x/cpu_init.c
@@ -16,6 +16,7 @@
 #include <asm/rtc.h>
 #include <asm/io.h>
 #include <linux/compiler.h>
+#include <fsl_dspi.h>
#if defined(CONFIG_CMD_NET)
 #include <config.h>
@@ -423,7 +424,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
 }
 #endif
-#ifdef CONFIG_CF_DSPI
+#ifdef CONFIG_FSL_DSPI
 void cfspi_port_conf(void)
 {
    gpio_t *gpio = (gpio_t *) MMAP_GPIO;
diff --git a/arch/m68k/cpu/mcf5445x/speed.c b/arch/m68k/cpu/mcf5445x/speed.c
index 07a9b35..29c858e 100644
--- a/arch/m68k/cpu/mcf5445x/speed.c
+++ b/arch/m68k/cpu/mcf5445x/speed.c
@@ -279,3 +279,10 @@ int get_clocks(void)
return (0);
 }
+
+#ifdef CONFIG_FSL_DSPI
+int get_dspi_clk(void)
+{
+	return gd->bus_clk;
+}
+#endif
diff --git a/arch/m68k/include/asm/immap_5227x.h b/arch/m68k/include/asm/immap_5227x.h
index 2cc4102..18a592e 100644
--- a/arch/m68k/include/asm/immap_5227x.h
+++ b/arch/m68k/include/asm/immap_5227x.h
@@ -51,7 +51,6 @@
 #define MMAP_PLL	(CONFIG_SYS_MBAR + 0x000C0000)
#include <asm/coldfire/crossbar.h>
-#include <asm/coldfire/dspi.h>
 #include <asm/coldfire/edma.h>
 #include <asm/coldfire/eport.h>
 #include <asm/coldfire/flexbus.h>
diff --git a/arch/m68k/include/asm/immap_5301x.h b/arch/m68k/include/asm/immap_5301x.h
index 337fe73..6b19023 100644
--- a/arch/m68k/include/asm/immap_5301x.h
+++ b/arch/m68k/include/asm/immap_5301x.h
@@ -52,7 +52,6 @@
 #define MMAP_ESDHC	(CONFIG_SYS_MBAR + 0x000CC000)
#include <asm/coldfire/crossbar.h>
-#include <asm/coldfire/dspi.h>
 #include <asm/coldfire/edma.h>
 #include <asm/coldfire/eport.h>
 #include <asm/coldfire/flexbus.h>
diff --git a/arch/m68k/include/asm/immap_5441x.h b/arch/m68k/include/asm/immap_5441x.h
index 4db6145..62cb681 100644
--- a/arch/m68k/include/asm/immap_5441x.h
+++ b/arch/m68k/include/asm/immap_5441x.h
@@ -78,7 +78,6 @@
 #define MMAP_GPIO	0xEC094000
#include <asm/coldfire/crossbar.h>
-#include <asm/coldfire/dspi.h>
 #include <asm/coldfire/edma.h>
 #include <asm/coldfire/eport.h>
 #include <asm/coldfire/flexbus.h>
diff --git a/arch/m68k/include/asm/immap_5445x.h b/arch/m68k/include/asm/immap_5445x.h
index 2b12972..1525f9d 100644
--- a/arch/m68k/include/asm/immap_5445x.h
+++ b/arch/m68k/include/asm/immap_5445x.h
@@ -55,7 +55,6 @@
#include <asm/coldfire/ata.h>
 #include <asm/coldfire/crossbar.h>
-#include <asm/coldfire/dspi.h>
 #include <asm/coldfire/edma.h>
 #include <asm/coldfire/eport.h>
 #include <asm/coldfire/flexbus.h>
diff --git a/arch/m68k/include/asm/immap_547x_8x.h b/arch/m68k/include/asm/immap_547x_8x.h
index e1ce220..baa7779 100644
--- a/arch/m68k/include/asm/immap_547x_8x.h
+++ b/arch/m68k/include/asm/immap_547x_8x.h
@@ -41,7 +41,6 @@
 #define MMAP_SRAMCFG	(CONFIG_SYS_MBAR + 0x0001FF00)
 #define MMAP_SEC	(CONFIG_SYS_MBAR + 0x00020000)
-#include <asm/coldfire/dspi.h>
 #include <asm/coldfire/eport.h>
 #include <asm/coldfire/flexbus.h>
 #include <asm/coldfire/flexcan.h>
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 27902fe..a047f02 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
 obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 obj-$(CONFIG_BFIN_SPI) += bfin_spi.o
 obj-$(CONFIG_BFIN_SPI6XX) += bfin_spi6xx.o
-obj-$(CONFIG_CF_SPI) += cf_spi.o
+obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o
 obj-$(CONFIG_CF_QSPI) += cf_qspi.o
 obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
 obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
diff --git a/drivers/spi/cf_spi.c b/drivers/spi/fsl_dspi.c
similarity index 56%
rename from drivers/spi/cf_spi.c
rename to drivers/spi/fsl_dspi.c
index 879a809..47ac1f8 100644
--- a/drivers/spi/cf_spi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -1,10 +1,10 @@
 /*
- *
  * (C) Copyright 2000-2003
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2009, 2013 Freescale Semiconductor, Inc.
  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ * Chao Fu (B44548@freescale.com)
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -12,26 +12,28 @@
 #include <common.h>
 #include <spi.h>
 #include <malloc.h>
+#include <asm/io.h>
+#include <fsl_dspi.h>
+
+#ifdef CONFIG_VF610
+#include <asm/arch/clock.h>
+#endif
+
+#ifndef CONFIG_VF610
 #include <asm/immap.h>
+#endif
-struct cf_spi_slave {
+struct dspi_slave {
    struct spi_slave slave;
+	struct dspi *regs;
    uint baudrate;
    int charbit;
 };
-int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
-	       void *din, ulong flags);
-struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode);
-void cfspi_init(void);
-void cfspi_tx(u32 ctrl, u16 data);
-u16 cfspi_rx(void);
-
-extern void cfspi_port_conf(void);
-extern int cfspi_claim_bus(uint bus, uint cs);
-extern void cfspi_release_bus(uint bus, uint cs);
-
-DECLARE_GLOBAL_DATA_PTR;
+static inline struct dspi_slave *to_dspi_spi(struct spi_slave *slave)
+{
+	return container_of(slave, struct dspi_slave, slave);
+}
#ifndef CONFIG_SPI_IDLE_VAL
 #if defined(CONFIG_SPI_MMC)
@@ -41,77 +43,37 @@ DECLARE_GLOBAL_DATA_PTR;
 #endif
 #endif
-#if defined(CONFIG_CF_DSPI)
+#if defined(CONFIG_FSL_DSPI)
 /* DSPI specific mode */
 #define SPI_MODE_MOD	0x00200000
 #define SPI_DBLRATE	0x00100000
-void cfspi_init(void)
-{
-	volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-
-	cfspi_port_conf();	/* port configuration */
-
-	dspi->mcr = DSPI_MCR_MSTR | DSPI_MCR_CSIS7 | DSPI_MCR_CSIS6 |
-	    DSPI_MCR_CSIS5 | DSPI_MCR_CSIS4 | DSPI_MCR_CSIS3 |
-	    DSPI_MCR_CSIS2 | DSPI_MCR_CSIS1 | DSPI_MCR_CSIS0 |
-	    DSPI_MCR_CRXF | DSPI_MCR_CTXF;
-
-	/* Default setting in platform configuration */
-#ifdef CONFIG_SYS_DSPI_CTAR0
-	dspi->ctar[0] = CONFIG_SYS_DSPI_CTAR0;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR1
-	dspi->ctar[1] = CONFIG_SYS_DSPI_CTAR1;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR2
-	dspi->ctar[2] = CONFIG_SYS_DSPI_CTAR2;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR3
-	dspi->ctar[3] = CONFIG_SYS_DSPI_CTAR3;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR4
-	dspi->ctar[4] = CONFIG_SYS_DSPI_CTAR4;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR5
-	dspi->ctar[5] = CONFIG_SYS_DSPI_CTAR5;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR6
-	dspi->ctar[6] = CONFIG_SYS_DSPI_CTAR6;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR7
-	dspi->ctar[7] = CONFIG_SYS_DSPI_CTAR7;
-#endif
-}
-
-void cfspi_tx(u32 ctrl, u16 data)
+static void dspi_tx(struct dspi_slave *dspislave, u32 ctrl, u16 data)
 {
-	volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-
-	while ((dspi->sr & 0x0000F000) >= 4) ;
+	while ((readl(&dspislave->regs->sr) & 0x0000F000) >= 4)
+		;
-	dspi->tfr = (ctrl | data);
+	writel((ctrl | data), &dspislave->regs->tfr);
 }
-u16 cfspi_rx(void)
+static u16 dspi_rx(struct dspi_slave *dspislave)
 {
-	volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
+	while ((readl(&dspislave->regs->sr) & 0x000000F0) == 0)
+		;
-	while ((dspi->sr & 0x000000F0) == 0) ;
-
-	return (dspi->rfr & 0xFFFF);
+	return (u16)(readl(&dspislave->regs->rfr) & 0xFFFF);
 }
-int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
+int dspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
           void *din, ulong flags)
 {
-	struct cf_spi_slave *cfslave = (struct cf_spi_slave *)slave;
+	struct dspi_slave *dspislave = to_dspi_spi(slave);
    u16 *spi_rd16 = NULL, *spi_wr16 = NULL;
    u8 *spi_rd = NULL, *spi_wr = NULL;
    static u32 ctrl = 0;
    uint len = bitlen >> 3;
-	if (cfslave->charbit == 16) {
+	if (dspislave->charbit == 16) {
    	bitlen >>= 1;
    	spi_wr16 = (u16 *) dout;
    	spi_rd16 = (u16 *) din;
@@ -129,19 +91,19 @@ int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
    	int tmp_len = len - 1;
    	while (tmp_len--) {
    		if (dout != NULL) {
-				if (cfslave->charbit == 16)
-					cfspi_tx(ctrl, *spi_wr16++);
+				if (dspislave->charbit == 16)
+					dspi_tx(dspislave, ctrl, *spi_wr16++);
    			else
-					cfspi_tx(ctrl, *spi_wr++);
-				cfspi_rx();
+					dspi_tx(dspislave, ctrl, *spi_wr++);
+				dspi_rx(dspislave);
    		}
if (din != NULL) {
-				cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL);
-				if (cfslave->charbit == 16)
-					*spi_rd16++ = cfspi_rx();
+				dspi_tx(dspislave, ctrl, CONFIG_SPI_IDLE_VAL);
+				if (dspislave->charbit == 16)
+					*spi_rd16++ = dspi_rx(dspislave);
    			else
-					*spi_rd++ = cfspi_rx();
+					*spi_rd++ = dspi_rx(dspislave);
    		}
    	}
@@ -153,30 +115,30 @@ int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
if (len) {
    	if (dout != NULL) {
-			if (cfslave->charbit == 16)
-				cfspi_tx(ctrl, *spi_wr16);
+			if (dspislave->charbit == 16)
+				dspi_tx(dspislave, ctrl, *spi_wr16);
    		else
-				cfspi_tx(ctrl, *spi_wr);
-			cfspi_rx();
+				dspi_tx(dspislave, ctrl, *spi_wr);
+			dspi_rx(dspislave);
    	}
if (din != NULL) {
-			cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL);
-			if (cfslave->charbit == 16)
-				*spi_rd16 = cfspi_rx();
+			dspi_tx(dspislave, ctrl, CONFIG_SPI_IDLE_VAL);
+			if (dspislave->charbit == 16)
+				*spi_rd16 = dspi_rx(dspislave);
    		else
-				*spi_rd = cfspi_rx();
+				*spi_rd = dspi_rx(dspislave);
    	}
    } else {
    	/* dummy read */
-		cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL);
-		cfspi_rx();
+		dspi_tx(dspislave, ctrl, CONFIG_SPI_IDLE_VAL);
+		dspi_rx(dspislave);
    }
return 0;
 }
-struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode)
+struct spi_slave *dspi_setup_slave(struct dspi_slave *dspislave, uint mode)
 {
    /*
     * bit definition for mode:
@@ -191,7 +153,6 @@ struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode)
     *     11 -  8: Delay after transfer scaler
     *      7 -  0: SPI_CPHA, SPI_CPOL, SPI_LSB_FIRST
     */
-	volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
    int prescaler[] = { 2, 3, 5, 7 };
    int scaler[] = {
    	2, 4, 6, 8,
@@ -200,21 +161,63 @@ struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode)
    	4096, 8192, 16384, 32768
    };
    int i, j, pbrcnt, brcnt, diff, tmp, dbr = 0;
-	int best_i, best_j, bestmatch = 0x7FFFFFFF, baud_speed;
+	int best_i, best_j, bestmatch = 0x7FFFFFFF, baud_speed, bus_clk;
    u32 bus_setup = 0;
+	dspislave->regs = (dspi_t *)MMAP_DSPI;
+
+#ifndef CONFIG_VF610
+	cfspi_port_conf();	/* port configuration */
+#endif
+
+	writel(DSPI_MCR_MSTR | DSPI_MCR_CSIS7 | DSPI_MCR_CSIS6 |
+		DSPI_MCR_CSIS5 | DSPI_MCR_CSIS4 | DSPI_MCR_CSIS3 |
+		DSPI_MCR_CSIS2 | DSPI_MCR_CSIS1 | DSPI_MCR_CSIS0 |
+		DSPI_MCR_CRXF | DSPI_MCR_CTXF,
+		&dspislave->regs->mcr);
+	/* Default setting in platform configuration */
+#ifdef CONFIG_SYS_DSPI_CTAR0
+	writel(CONFIG_SYS_DSPI_CTAR0, &dspislave->regs->ctar[0]);
+#endif
+#ifdef CONFIG_SYS_DSPI_CTAR1
+	writel(CONFIG_SYS_DSPI_CTAR1, &dspislave->regs->ctar[1]);
+#endif
+#ifdef CONFIG_SYS_DSPI_CTAR2
+	writel(CONFIG_SYS_DSPI_CTAR2, &dspislave->regs->ctar[2]);
+#endif
+#ifdef CONFIG_SYS_DSPI_CTAR3
+	writel(CONFIG_SYS_DSPI_CTAR3, &dspislave->regs->ctar[3]);
+#endif
+#ifdef CONFIG_SYS_DSPI_CTAR4
+	writel(CONFIG_SYS_DSPI_CTAR4, &dspislave->regs->ctar[4]);
+#endif
+#ifdef CONFIG_SYS_DSPI_CTAR5
+	writel(CONFIG_SYS_DSPI_CTAR5, &dspislave->regs->ctar[5]);
+#endif
+#ifdef CONFIG_SYS_DSPI_CTAR6
+	writel(CONFIG_SYS_DSPI_CTAR6, &dspislave->regs->ctar[6]);
+#endif
+#ifdef CONFIG_SYS_DSPI_CTAR7
+	writel(CONFIG_SYS_DSPI_CTAR7, &dspislave->regs->ctar[7]);
+#endif
+
    tmp = (prescaler[3] * scaler[15]);
+#ifdef CONFIG_VF610
+	bus_clk = mxc_get_clock(MXC_DSPI_CLK);
+#else
+	bus_clk = get_dspi_clk();
+#endif
    /* Maximum and minimum baudrate it can handle */
-	if ((cfslave->baudrate > (gd->bus_clk >> 1)) ||
-	    (cfslave->baudrate < (gd->bus_clk / tmp))) {
+	if ((dspislave->baudrate > (bus_clk >> 1)) ||
+	    (dspislave->baudrate < (bus_clk / tmp))) {
    	printf("Exceed baudrate limitation: Max %d - Min %d\n",
-		       (int)(gd->bus_clk >> 1), (int)(gd->bus_clk / tmp));
+		       (int)(bus_clk >> 1), (int)(bus_clk / tmp));
    	return NULL;
    }
/* Activate Double Baud when it exceed 1/4 the bus clk */
    if ((CONFIG_SYS_DSPI_CTAR0 & DSPI_CTAR_DBR) ||
-	    (cfslave->baudrate > (gd->bus_clk / (prescaler[0] * scaler[0])))) {
+	    (dspislave->baudrate > (bus_clk / (prescaler[0] * scaler[0])))) {
    	bus_setup |= DSPI_CTAR_DBR;
    	dbr = 1;
    }
@@ -231,7 +234,8 @@ struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode)
if ((mode & 0xF0000000) == 0)
    		bus_setup |=
-			    dspi->ctar[cfslave->slave.bus] & 0x78000000;
+			    readl(&dspislave->regs->ctar[dspislave->slave.bus])
+			    & 0x78000000;
    	else
    		bus_setup |= ((mode & 0xF0000000) >> 1);
@@ -246,25 +250,26 @@ struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode)
    	bus_setup |= (mode & 0x0FC00000) >> 4;	/* PSCSCK, PASC, PDT */
    	bus_setup |= (mode & 0x000FFF00) >> 4;	/* CSSCK, ASC, DT */
    } else
-		bus_setup |= (dspi->ctar[cfslave->slave.bus] & 0x78FCFFF0);
+		bus_setup |= readl(&dspislave->regs->ctar[dspislave->slave.bus])
+				& 0x78FCFFF0;
-	cfslave->charbit =
-	    ((dspi->ctar[cfslave->slave.bus] & 0x78000000) ==
-	     0x78000000) ? 16 : 8;
+	dspislave->charbit =
+	    ((readl(&dspislave->regs->ctar[dspislave->slave.bus]) & 0x78000000)
+	     == 0x78000000) ? 16 : 8;
pbrcnt = sizeof(prescaler) / sizeof(int);
    brcnt = sizeof(scaler) / sizeof(int);
/* baudrate calculation - to closer value, may not be exact match */
    for (best_i = 0, best_j = 0, i = 0; i < pbrcnt; i++) {
-		baud_speed = gd->bus_clk / prescaler[i];
+		baud_speed = bus_clk / prescaler[i];
    	for (j = 0; j < brcnt; j++) {
    		tmp = (baud_speed / scaler[j]) * (1 + dbr);
-			if (tmp > cfslave->baudrate)
-				diff = tmp - cfslave->baudrate;
+			if (tmp > dspislave->baudrate)
+				diff = tmp - dspislave->baudrate;
    		else
-				diff = cfslave->baudrate - tmp;
+				diff = dspislave->baudrate - tmp;
if (diff < bestmatch) {
    			bestmatch = diff;
@@ -273,16 +278,12 @@ struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode)
    		}
    	}
    }
-	bus_setup |= (DSPI_CTAR_PBR(best_i) | DSPI_CTAR_BR(best_j));
-	dspi->ctar[cfslave->slave.bus] = bus_setup;
-	return &cfslave->slave;
+	bus_setup |= (DSPI_CTAR_PBR(best_i) | DSPI_CTAR_BR(best_j));
+	writel(bus_setup, &dspislave->regs->ctar[dspislave->slave.bus]);
+	return &dspislave->slave;
 }
-#endif				/* CONFIG_CF_DSPI */
-
-#ifdef CONFIG_CF_QSPI
-/* 52xx, 53xx */
-#endif				/* CONFIG_CF_QSPI */
+#endif				/* CONFIG_FSL_DSPI */
#ifdef CONFIG_CMD_SPI
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
@@ -303,25 +304,22 @@ void spi_init_r(void)
void spi_init(void)
 {
-	cfspi_init();
 }
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
    			  unsigned int max_hz, unsigned int mode)
 {
-	struct cf_spi_slave *cfslave;
+	struct dspi_slave *dspislave;
if (!spi_cs_is_valid(bus, cs))
    	return NULL;
-
-	cfslave = spi_alloc_slave(struct cf_spi_slave, bus, cs);
-	if (!cfslave)
+	dspislave = spi_alloc_slave(struct dspi_slave, bus, cs);
+	if (!dspislave)
    	return NULL;
-	cfslave->baudrate = max_hz;
-
+	dspislave->baudrate = max_hz;
    /* specific setup */
-	return cfspi_setup_slave(cfslave, mode);
+	return dspi_setup_slave(dspislave, mode);
 }
void spi_free_slave(struct spi_slave *slave)
@@ -331,17 +329,23 @@ void spi_free_slave(struct spi_slave *slave)
int spi_claim_bus(struct spi_slave *slave)
 {
+#ifdef CONFIG_VF610
+	return 0;
+#else
    return cfspi_claim_bus(slave->bus, slave->cs);
+#endif
 }
void spi_release_bus(struct spi_slave *slave)
 {
+#ifndef CONFIG_VF610
    cfspi_release_bus(slave->bus, slave->cs);
+#endif
 }
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
         void *din, unsigned long flags)
 {
-	return cfspi_xfer(slave, bitlen, dout, din, flags);
+	return dspi_xfer(slave, bitlen, dout, din, flags);
 }
 #endif				/* CONFIG_CMD_SPI */
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index cde7305..485af4c 100644
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -137,8 +137,7 @@
 #define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
-#define CONFIG_CF_DSPI
+#define CONFIG_FSL_DSPI
 #define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE		0x7
 #ifdef CONFIG_CMD_SPI
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index de063b7..d8bb8cd 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -207,8 +207,7 @@
 #define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
-#define CONFIG_CF_DSPI
+#define CONFIG_FSL_DSPI
 #define CONFIG_SERIAL_FLASH
 #define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE		0x7
diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index 0f4b726..7141601 100644
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -148,8 +148,7 @@
 #define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
-#define CONFIG_CF_DSPI
+#define CONFIG_FSL_DSPI
 #define CONFIG_SERIAL_FLASH
 #define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE		0x7
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index 7a55d3c..15b7c40 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -181,8 +181,7 @@
 #define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
-#define CONFIG_CF_SPI
-#define CONFIG_CF_DSPI
+#define CONFIG_FSL_DSPI
 #define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE		0x13
 #ifdef CONFIG_CMD_SPI
diff --git a/arch/m68k/include/asm/coldfire/dspi.h b/include/fsl_dspi.h
similarity index 96%
rename from arch/m68k/include/asm/coldfire/dspi.h
rename to include/fsl_dspi.h
index fda7138..36a352e 100644
--- a/arch/m68k/include/asm/coldfire/dspi.h
+++ b/include/fsl_dspi.h
@@ -1,8 +1,9 @@
 /*
- * MCF5227x Internal Memory Map
+ * Freescale DSPI Module Defines
  *
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2007, 2013 Freescale Semiconductor, Inc.
  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ * Chao Fu (B44548@freesacle.com)
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -19,8 +20,7 @@ typedef struct dspi {
    u32 sr;		/* 0x2C */
    u32 irsr;	/* 0x30 */
    u32 tfr;	/* 0x34 - PUSHR */
-	u16 resv1;	/* 0x38 */
-	u16 rfr;	/* 0x3A - POPR */
+	u32 rfr;	/* 0x38 - POPR */
 #ifdef CONFIG_MCF547x_8x
    u32 tfdr[4];	/* 0x3C */
    u8 resv2[0x30];	/* 0x40 */
-- 
1.8.4



    