We can simplify some cpu/SoC level initialization by moving it to be after the environment and non-volatile storage is setup as there might be dependancies on such things in various boot configurations.
For example for FSL SoC's with QE if we boot from NAND we need it setup to extra the ucode image to initialize the QE. If we always do this after environment & non-volatile storage is working we can have the code be the same regardless of NOR, NAND, SPI, MMC boot.
Signed-off-by: Kumar Gala galak@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 15 +++++++++------ arch/powerpc/lib/board.c | 7 +++++++ 2 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 8ece970..fa77857 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -384,12 +384,6 @@ int cpu_init_r(void)
enable_cpc();
-#ifdef CONFIG_QE - uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */ - qe_init(qe_base); - qe_reset(); -#endif - /* needs to be in ram since code uses global static vars */ fsl_serdes_init();
@@ -449,3 +443,12 @@ int sata_initialize(void) return 1; } #endif + +void cpu_late_init_r(void) +{ +#ifdef CONFIG_QE + uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */ + qe_init(qe_base); + qe_reset(); +#endif +} diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index b88cf6b..525a0d4 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -186,6 +186,11 @@ int __board_flash_wp_on(void) } int board_flash_wp_on(void) __attribute__((weak, alias("__board_flash_wp_on")));
+void __cpu_late_init_r(void) +{ +} +void cpu_late_init_r(void) __attribute__((weak, alias("__cpu_late_init_r"))); + static int init_func_ram (void) { #ifdef CONFIG_BOARD_TYPES @@ -986,6 +991,8 @@ void board_init_r (gd_t *id, ulong dest_addr) #endif #endif
+ cpu_late_init_r(); + #ifdef CONFIG_LAST_STAGE_INIT WATCHDOG_RESET (); /*