On 04/08/2013 01:35:13 PM, Wolfgang Denk wrote:
Dear sun york-R58495,
In message C707E9F4D8007146BF8DC1424B113AC70B3A6A83@039-SN2MPN1-012.039d.mgd.msft.net you wrote:
I think it is best to keep this patch as it and stick with the original flush_cache name. It uses the existing function flush_cache() which is available for most (if not all)
architectures.
Splitting the dcache and icache not only adds more code, but architecture-dependent code.
As mentioned before: reusing existing code is fine, but we already have commands for cache handling, and adding arbitrary new ones to implement combinations of functions makes does not scale. Assume tomorrow someone needs to add more ganular handling for example regarding L2 caches, etc. Would you suggest to add another set of new commands, then? This makes no sense.
Maybe "cache" should be the toplevel command, with "icache" and "dcache" refactored to be subcommands? Of course, then you're making an incompatible interface change. How much is consistency worth?
Please implement IC related operations as subcommands to the "icache" command, and DC releated ones as subcommands to "dcache".
The whole point of the patch is to expose the existing flush_cache() functionality, which is not split into icache/dcache. From the user's perspective, it's a command to flush the specified region out of *all* caches. It's an implementation detail that some hardware or architectures accomplish this using separate dcache and icache instructions. If you make the interface be "icache/dcache", how would you handle hardware where the flushing mechanism (or even the cache itself) is not split?
[In the example of L2 cache above, it would be for example sufficient to add a "-L2" option to the "icache" / "dcache" commands.]
Would it? On our chips L2 cache is (more or less) unified. There's no separate icache/dcache flush.
-Scott